Searched refs:SSPA_AUD_PLL_CTRL0_DIV_FBCCLK (Results 1 – 1 of 1) sorted by relevance
44 #define SSPA_AUD_PLL_CTRL0_DIV_FBCCLK(x) ((x) << 3) macro146 val |= SSPA_AUD_PLL_CTRL0_DIV_FBCCLK(predivs[prediv].fbcclk); in audio_pll_recalc_rate()212 val |= SSPA_AUD_PLL_CTRL0_DIV_FBCCLK(predivs[prediv].fbcclk); in audio_pll_set_rate()