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Searched refs:SSE (Results 1 – 11 of 11) sorted by relevance

/linux-6.1.9/arch/x86/kernel/
Dverify_cpu.S124 jz .Lverify_cpu_no_longmode # only try to force SSE on AMD
127 btr $15,%eax # enable SSE
/linux-6.1.9/Documentation/devicetree/bindings/arm/
Darm,corstone1000.yaml14 ARM's Corstone1000 includes pre-verified Corstone SSE-710 subsystem that
/linux-6.1.9/arch/x86/crypto/
Dcrct10dif-pcl-asm_64.S2 # Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
Dchacha-ssse3-x86_64.S231 # the state matrix in SSE registers four times. As we need some scratch
236 # which allows us to do XOR in SSE registers. 8/16-bit word rotation is
/linux-6.1.9/drivers/scsi/aic7xxx/
Daic7xxx_pci.c591 #define SSE 0x40 macro
1942 if (status1 & SSE) { in ahc_pci_intr()
1963 if ((status1 & (DPE|SSE|RMA|RTA|STA|DPR)) == 0) { in ahc_pci_intr()
Daic79xx.reg1144 field SSE 0x40
1162 field SSE 0x40
1179 field SSE 0x40
1195 field SSE 0x40
1212 field SSE 0x40
1227 field SSE 0x40
1244 field SSE 0x40
Daic79xx_pci.c730 #define SSE 0x40 macro
Daic79xx_reg.h_shipped1309 #define SSE 0x40
/linux-6.1.9/tools/arch/x86/kcpuid/
Dcpuid.csv75 1, 0, EDX, 25, sse, SSE
246 0xD, 0, EAX, 1, sse, SSE state
/linux-6.1.9/arch/x86/
DKconfig.cpu251 of SSE and tells gcc to treat the CPU as a 686.
/linux-6.1.9/
DCREDITS1733 D: Pentium III FXSR, SSE support