Searched refs:SSB_TMSLOW_CLOCK (Results 1 – 3 of 3) sorted by relevance
999 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject; in ssb_device_is_enabled()1001 return (val == SSB_TMSLOW_CLOCK); in ssb_device_is_enabled()1024 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK | in ssb_device_enable()1039 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC | in ssb_device_enable()1043 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK | in ssb_device_enable()1085 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) { in ssb_device_disable()1086 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); in ssb_device_disable()1099 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | in ssb_device_disable()
259 SSB_IMSTATE_REJECT | SSB_TMSLOW_CLOCK); in brcmf_chip_sb_iscoreup()260 return SSB_TMSLOW_CLOCK == regdata; in brcmf_chip_sb_iscoreup()292 if ((val & SSB_TMSLOW_CLOCK) != 0) { in brcmf_chip_sb_coredisable()326 val = SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | in brcmf_chip_sb_coredisable()404 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | in brcmf_chip_sb_resetcore()422 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK); in brcmf_chip_sb_resetcore()428 SSB_TMSLOW_CLOCK); in brcmf_chip_sb_resetcore()
103 #define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */ macro