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Searched refs:SQ_DPP_ROW_SR5 (Results 1 – 3 of 3) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_enum.h3565 #define SQ_DPP_ROW_SR5 0x115 macro
Dgfx_8_1_enum.h3583 #define SQ_DPP_ROW_SR5 0x115 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/
Dvega10_enum.h18195 #define SQ_DPP_ROW_SR5 0x00000115 macro