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Searched refs:SPRCTL (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/gvt/
Ddisplay.c190 vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; in emulate_monitor_status_change()
501 vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; in emulate_monitor_status_change()
Dfb_decoder.c424 val = vgpu_vreg_t(vgpu, SPRCTL(pipe)); in intel_vgpu_decode_sprite_plane()
Dcmd_parser.c1318 info->ctrl_reg = SPRCTL(info->pipe); in gen8_decode_mi_display_flip()
Dhandlers.c1034 if (vgpu_vreg_t(vgpu, SPRCTL(pipe)) & PLANE_CTL_ASYNC_FLIP) in spr_surf_mmio_write()
/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_sprite.c908 intel_de_write_fw(dev_priv, SPRCTL(pipe), sprctl); in ivb_sprite_update_arm()
922 intel_de_write_fw(dev_priv, SPRCTL(pipe), 0); in ivb_sprite_disable_arm()
943 ret = intel_de_read(dev_priv, SPRCTL(plane->pipe)) & SPRITE_ENABLE; in ivb_sprite_get_hw_state()
/linux-6.1.9/drivers/gpu/drm/i915/
Dintel_gvt_mmio_table.c180 MMIO_D(SPRCTL(PIPE_A)); in iterate_generic_mmio()
193 MMIO_D(SPRCTL(PIPE_B)); in iterate_generic_mmio()
206 MMIO_D(SPRCTL(PIPE_C)); in iterate_generic_mmio()
Di915_reg.h4542 #define SPRCTL(pipe) _MMIO_PIPE(pipe, _SPRA_CTL, _SPRB_CTL) macro