/linux-6.1.9/Documentation/devicetree/bindings/display/tegra/ |
D | nvidia,tegra124-sor.yaml | 7 title: NVIDIA Tegra SOR Output Encoder 14 The Serial Output Resource (SOR) can be used to drive HDMI, LVDS, eDP 71 description: index of the SOR interface 93 Each lane of the SOR, identified by the cell's index, is 115 - description: clock input for the SOR hardware 116 - description: SOR output clock 118 - description: reference clock for the SOR clock 119 - description: safe reference clock for the SOR clock 121 - description: SOR pad output clock 137 - description: clock input for the SOR hardware [all …]
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/linux-6.1.9/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
D | outp.c | 67 case DCB_OUTPUT_TMDS : *type = SOR; return TMDS; in nvkm_outp_xlat() 68 case DCB_OUTPUT_LVDS : *type = SOR; return LVDS; in nvkm_outp_xlat() 69 case DCB_OUTPUT_DP : *type = SOR; return DP; in nvkm_outp_xlat() 162 ior = nvkm_ior_find(outp->disp, SOR, ffs(outp->info.or) - 1); in nvkm_outp_acquire() 247 link = (ior->type == SOR) ? outp->info.sorconf.link : 0; in nvkm_outp_init_route()
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D | ior.c | 29 [SOR] = "SOR",
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D | mcp77.c | 43 return nvkm_ior_new_(&mcp77_sor, disp, SOR, id, false); in mcp77_sor_new()
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D | gp100.c | 57 return nvkm_ior_new_(&gp100_sor, disp, SOR, id, hda & BIT(id)); in gp100_sor_new()
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D | mcp89.c | 57 return nvkm_ior_new_(&mcp89_sor, disp, SOR, id, true); in mcp89_sor_new()
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D | gm107.c | 83 return nvkm_ior_new_(&gm107_sor, disp, SOR, id, true); in gm107_sor_new()
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D | g94.c | 180 if (ior->type != SOR) in g94_sor_war_update_sppll1() 304 return nvkm_ior_new_(&g94_sor, disp, SOR, id, false); in g94_sor_new()
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D | ga102.c | 122 return nvkm_ior_new_(&ga102_sor, disp, SOR, id, hda & BIT(id)); in ga102_sor_new()
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D | gk104.c | 105 return nvkm_ior_new_(&gk104_sor, disp, SOR, id, true); in gk104_sor_new()
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D | g84.c | 112 return nvkm_ior_new_(&g84_sor, disp, SOR, id, false); in g84_sor_new()
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D | gm200.c | 151 return nvkm_ior_new_(&gm200_sor, disp, SOR, id, hda & BIT(id)); in gm200_sor_new()
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D | gt215.c | 177 return nvkm_ior_new_(>215_sor, disp, SOR, id, true); in gt215_sor_new()
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D | tu102.c | 105 return nvkm_ior_new_(&tu102_sor, disp, SOR, id, hda & BIT(id)); in tu102_sor_new()
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D | ior.h | 12 SOR, enumerator
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D | nv50.c | 228 return nvkm_ior_new_(&nv50_sor, disp, SOR, id, false); in nv50_sor_new() 1017 if (ior->type == SOR) { in nv50_disp_super_ied_on() 1250 if (ior->type == SOR && ior->asy.proto == LVDS) { in nv50_disp_super_2_2() 1266 if (ior->type == SOR && ior->asy.proto == DP) in nv50_disp_super_2_2()
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D | base.c | 374 ior = nvkm_ior_find(disp, SOR, ffs(outp->info.or) - 1); in nvkm_disp_oneinit()
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D | gf119.c | 318 return nvkm_ior_new_(&gf119_sor, disp, SOR, id, true); in gf119_sor_new()
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D | gv100.c | 210 return nvkm_ior_new_(&gv100_sor, disp, SOR, id, hda & BIT(id)); in gv100_sor_new()
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/linux-6.1.9/drivers/gpu/drm/nouveau/dispnv50/ |
D | crcc57d.c | 26 crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SOR(or)); in crcc57d_set_src()
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D | crcc37d.c | 28 crc_args |= NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SOR(or)); in crcc37d_set_src()
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D | crc907d.c | 41 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, SOR(or)); in crc907d_set_src()
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/linux-6.1.9/Documentation/gpu/ |
D | tegra.rst | 80 controllers can drive both DSI outputs and both SOR outputs, the third cannot 117 by the versatile SOR output, which supports eDP, DP and HDMI. The SOR is able
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