Searched refs:SOF_HDA_ADSP_REG_CL_SD_BDLPL (Results 1 – 4 of 4) sorted by relevance
422 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPL, in hda_dsp_iccmax_stream_hw_params()438 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPL, in hda_dsp_iccmax_stream_hw_params()537 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPL, in hda_dsp_stream_hw_params()625 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPL, in hda_dsp_stream_hw_params()
184 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPL, HDA_CL_SD_BDLPLBA(0)); in cl_skl_cldma_stream_clear()243 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPL, in cl_skl_cldma_setup_controller()
266 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPL, 0); in hda_cl_cleanup()
134 #define SOF_HDA_ADSP_REG_CL_SD_BDLPL 0x18 macro