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Searched refs:SDMA1_BASE__INST3_SEG0 (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/
Dvega20_ip_offset.h735 #define SDMA1_BASE__INST3_SEG0 0 macro
Dsienna_cichlid_ip_offset.h934 #define SDMA1_BASE__INST3_SEG0 0 macro
Dvega10_ip_offset.h1043 #define SDMA1_BASE__INST3_SEG0 0 macro
Darct_ip_offset.h988 #define SDMA1_BASE__INST3_SEG0 0 macro
Daldebaran_ip_offset.h1269 #define SDMA1_BASE__INST3_SEG0 0x0001E800 macro