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Searched refs:SCU94 (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g5.c50 #define SCU94 0x94 /* Multi-function Pin Control #6 */ macro
60 #define COND2 { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
445 #define SGPS2_DESC SIG_DESC_SET(SCU94, 12)
476 SIG_EXPR_LIST_DECL_SINGLE(A18, DASHA18, DASHA18, COND1, SIG_DESC_SET(SCU94, 5));
481 SIG_EXPR_LIST_DECL_SINGLE(B18, DASHB18, DASHB18, COND1, SIG_DESC_SET(SCU94, 5));
486 SIG_EXPR_LIST_DECL_SINGLE(D17, DASHD17, DASHD17, COND1, SIG_DESC_SET(SCU94, 6));
491 SIG_EXPR_LIST_DECL_SINGLE(C17, DASHC17, DASHC17, COND1, SIG_DESC_SET(SCU94, 6));
496 SIG_EXPR_LIST_DECL_SINGLE(A17, DASHA17, DASHA17, COND1, SIG_DESC_SET(SCU94, 7));
501 SIG_EXPR_LIST_DECL_SINGLE(B17, DASHB17, DASHB17, COND1, SIG_DESC_SET(SCU94, 7));
621 SIG_EXPR_LIST_DECL_SINGLE(N5, DASHN5, DASHN5, SIG_DESC_SET(SCU94, 8));
[all …]
Dpinctrl-aspeed-g4.c49 #define SCU94 0x94 /* Multi-function Pin Control #6 */ macro
1120 #define VPOOFF0_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
1121 #define VPO12_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 1, 0 }
1122 #define VPO24_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 2, 0 }
1123 #define VPOOFF1_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 3, 0 }
1124 #define VPO_OFF_12 { ASPEED_IP_SCU, SCU94, 0x2, 0, 0 }
1125 #define VPO_24_OFF SIG_DESC_SET(SCU94, 1)