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Searched refs:SCLK_SPI0 (Results 1 – 25 of 32) sorted by relevance

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/linux-6.1.9/include/dt-bindings/clock/
Dsamsung,s3c64xx-clock.h102 #define SCLK_SPI0 90 macro
Dexynos7-clk.h109 #define SCLK_SPI0 17 macro
Ds5pv210.h193 #define SCLK_SPI0 171 macro
Drk3188-cru-common.h25 #define SCLK_SPI0 69 macro
Drk3128-cru.h20 #define SCLK_SPI0 65 macro
Drk3228-cru.h18 #define SCLK_SPI0 65 macro
Drv1108-cru.h17 #define SCLK_SPI0 65 macro
Drk3288-cru.h20 #define SCLK_SPI0 65 macro
Drk3308-cru.h31 #define SCLK_SPI0 27 macro
Drk3368-cru.h21 #define SCLK_SPI0 65 macro
Dpx30-cru.h38 #define SCLK_SPI0 36 macro
Drk3399-cru.h28 #define SCLK_SPI0 71 macro
/linux-6.1.9/Documentation/devicetree/bindings/spi/
Dspi-rockchip.yaml106 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
/linux-6.1.9/drivers/clk/samsung/
Dclk-s3c64xx.c256 GATE_SCLK(SCLK_SPI0, "sclk_spi0", "dout_spi0", SCLK_GATE, 20),
357 ALIAS(SCLK_SPI0, "s3c6410-spi.0", "spi_busclk2"),
Dclk-s5pv210.c594 GATE(SCLK_SPI0, "sclk_spi0", "dout_spi0", CLK_SRC_MASK0, 16,
Dclk-exynos7.c784 GATE(SCLK_SPI0, "sclk_spi0_user", "mout_sclk_spi0_user",
/linux-6.1.9/drivers/clk/rockchip/
Dclk-rk3128.c404 COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_3plls_p, 0,
Dclk-rk3228.c474 COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_2plls_p, 0,
Dclk-rk3188.c391 COMPOSITE_NOMUX(SCLK_SPI0, "sclk_spi0", "pclk_peri", 0,
Dclk-rk3368.c535 COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_cpll_gpll_p, 0,
Dclk-rk3288.c516 COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_cpll_gpll_p, 0,
Dclk-px30.c744 COMPOSITE(SCLK_SPI0, "clk_spi0", mux_gpll_xin24m_p, 0,
Dclk-rk3308.c403 COMPOSITE(SCLK_SPI0, "clk_spi0", mux_dpll_vpll0_xin24m_p, 0,
/linux-6.1.9/arch/arm/boot/dts/
Drk3xxx.dtsi453 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
Ds5pv210.dtsi158 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;

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