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Searched refs:SCLK_PWM0 (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Drk3308-cru.h30 #define SCLK_PWM0 26 macro
Dpx30-cru.h36 #define SCLK_PWM0 34 macro
/linux-6.1.9/arch/arm64/boot/dts/rockchip/
Drk3308.dtsi491 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
502 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
513 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
524 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
Dpx30.dtsi643 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
654 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
665 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
676 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
/linux-6.1.9/drivers/clk/rockchip/
Dclk-px30.c738 COMPOSITE(SCLK_PWM0, "clk_pwm0", mux_gpll_xin24m_p, 0,
Dclk-rk3308.c393 COMPOSITE(SCLK_PWM0, "clk_pwm0", mux_dpll_vpll0_xin24m_p, 0,