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/linux-6.1.9/drivers/scsi/pcmcia/
Dnsp_io.h21 unsigned int Register,
24 unsigned int Register);
48 unsigned int Register) in nsp_index_read() argument
50 outb(Register, BaseAddr + INDEXREG); in nsp_index_read()
55 unsigned int Register, in nsp_index_write() argument
58 outb(Register, BaseAddr + INDEXREG); in nsp_index_write()
68 unsigned int Register, in nsp_multi_read_1() argument
72 insb(BaseAddr + Register, buf, count); in nsp_multi_read_1()
87 unsigned int Register, in nsp_multi_read_2() argument
91 insw(BaseAddr + Register, buf, count); in nsp_multi_read_2()
[all …]
/linux-6.1.9/Documentation/scsi/
Dhptiop.rst8 Controller Register Map
14 BAR0 offset Register
21 BAR2 offset Register
23 0x10 Inbound Message Register 0
24 0x14 Inbound Message Register 1
25 0x18 Outbound Message Register 0
26 0x1C Outbound Message Register 1
27 0x20 Inbound Doorbell Register
28 0x24 Inbound Interrupt Status Register
29 0x28 Inbound Interrupt Mask Register
[all …]
/linux-6.1.9/Documentation/driver-api/mmc/
Dmmc-dev-attrs.rst20 cid Card Identification Register
21 csd Card Specific Data Register
22 scr SD Card Configuration Register (SD only)
23 date Manufacturing Date (from CID Register)
24 fwrev Firmware/Product Revision (from CID Register)
26 hwrev Hardware/Product Revision (from CID Register)
28 manfid Manufacturer ID (from CID Register)
29 name Product Name (from CID Register)
30 oemid OEM/Application ID (from CID Register)
31 prv Product Revision (from CID Register)
[all …]
/linux-6.1.9/arch/arm/include/debug/
Dat91.S19 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
23 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
32 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
Dvf.S23 strb \rd, [\rx, #0x7] @ Data Register
27 1001: ldrb \rd, [\rx, #0x4] @ Status Register 1
Dstm32.S34 1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
40 1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
/linux-6.1.9/Documentation/devicetree/bindings/hwinfo/
Drenesas,prr.yaml7 title: Renesas Product Register
14 Most Renesas ARM SoCs have a Product Register or Boundary Scan ID
15 Register that allows to retrieve SoC product and revision information.
/linux-6.1.9/Documentation/devicetree/bindings/display/imx/
Dfsl,imx-fb.txt21 - fsl,dmacr: DMA Control Register value. This is optional. By default, the
23 - fsl,lpccr: Contrast Control Register value. This property provides the
26 - fsl,lscr1: LCDC Sharp Configuration Register value.
/linux-6.1.9/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx27-pinctrl.txt24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
30 Register: DDIR
40 3 - Data Register
47 1 - Interrupt Status Register
/linux-6.1.9/Documentation/devicetree/bindings/sound/
Dalc5623.txt11 Register. If absent or has the value of 0, the
15 Control Register. If absent or has value 0, the
/linux-6.1.9/Documentation/devicetree/bindings/rtc/
Drtc-cmos.txt11 called "Register B".
15 "Register A" and "B" are usually initialized by the firmware (BIOS for
/linux-6.1.9/drivers/mtd/chips/
DKconfig167 erased. Each Protection Register can be accessed multiple times to
170 Each Protection Register has an associated Lock Register bit. When a
171 Lock Register bit is programmed, the associated Protection Register
173 because the Lock Register bits themselves are OTP, when programmed,
174 Lock Register bits cannot be erased. Therefore, when a Protection
175 Register is locked, it cannot be unlocked.
/linux-6.1.9/Documentation/m68k/
Dbuddha-driver.rst10 Register map of the Buddha IDE controller and the
45 $7fe Speed-select Register: Read & Write
48 $800-$8ff IDE-Select 0 (Port 0, Register set 0)
50 $900-$9ff IDE-Select 1 (Port 0, Register set 1)
52 $a00-$aff IDE-Select 2 (Port 1, Register set 0)
54 $b00-$bff IDE-Select 3 (Port 1, Register set 1)
56 $c00-$cff IDE-Select 4 (Port 2, Register set 0,
59 $d00-$dff IDE-Select 5 (Port 3, Register set 1,
/linux-6.1.9/drivers/crypto/caam/
DKconfig97 bool "Register algorithm implementations with the Crypto API"
128 bool "Register hash algorithm implementations with Crypto API"
137 bool "Register public key cryptography implementations with Crypto API"
146 bool "Register caam device for hwrng API"
155 bool "Register Pseudo random number generation implementation with Crypto API"
/linux-6.1.9/Documentation/parisc/
Dregisters.rst2 Register Usage for Linux/PA-RISC
24 CR19 Interrupt Instruction Register
25 CR20 Interrupt Space Register
26 CR21 Interrupt Offset Register
108 Register usage notes, originally from John Marvin, with some additional
/linux-6.1.9/Documentation/arm64/
Dcpu-feature-registers.rst115 1) ID_AA64ISAR0_EL1 - Instruction Set Attribute Register 0
148 2) ID_AA64PFR0_EL1 - Processor Feature Register 0
173 3) ID_AA64PFR1_EL1 - Processor Feature Register 1
186 4) MIDR_EL1 - Main ID Register
296 10) MVFR0_EL1 - AArch32 Media and VFP Feature Register 0
304 11) MVFR1_EL1 - AArch32 Media and VFP Feature Register 1
318 12) ID_ISAR5_EL1 - AArch32 Instruction Set Attribute Register 5
/linux-6.1.9/Documentation/devicetree/bindings/gpio/
Drockchip,rk3328-grf-gpio.yaml7 title: Rockchip RK3328 General Register Files GPIO controller
10 The Rockchip RK3328 General Register File (GRF) outputs only the
/linux-6.1.9/Documentation/devicetree/bindings/display/bridge/
Dcdns,mhdp8546.yaml23 Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P).
27 Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
29 Register block of mhdptx sapb registers.
/linux-6.1.9/Documentation/devicetree/bindings/clock/
Didt,versaclock5.yaml35 Register, respectively. Their behavior is summarized by the following
90 bit of the Primary Source and Shutdown Register.
100 Shutdown Register.
107 Configuration" in the Versaclock 5/6/6E Family Register Description
Dmarvell,armada-3700-uart-clock.yaml17 - description: UART Clock Control Register
18 - description: UART 2 Baud Rate Divisor Register
/linux-6.1.9/Documentation/powerpc/
Dsyscall64-abi.rst47 Register preservation rules
49 Register preservation rules match the ELF ABI calling sequence with some
55 | Register | Preservation Rules | Purpose |
73 | Register | Preservation Rules | Purpose |
136 Register preservation rules
/linux-6.1.9/Documentation/devicetree/bindings/perf/
Darm,smmu-v3-pmcg.yaml30 - description: Register page 0
31 - description: Register page 1, if SMMU_PMCG_CFGR.RELOC_CTRS = 1
/linux-6.1.9/Documentation/devicetree/bindings/reset/
Dintel,rcu-gw.yaml26 - description: Register offset
27 - description: Register bit offset
/linux-6.1.9/drivers/soc/rockchip/
DKconfig9 bool "Rockchip General Register Files support" if COMPILE_TEST
12 The General Register Files are a central component providing
/linux-6.1.9/Documentation/devicetree/bindings/soc/qcom/
Dqcom,eud.yaml25 - description: EUD Base Register Region
26 - description: EUD Mode Manager Register

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