1 // SPDX-License-Identifier: GPL-2.0
2
3 /*
4 * The RTC driver for Sunplus SP7021
5 *
6 * Copyright (C) 2019 Sunplus Technology Inc., All rights reseerved.
7 */
8
9 #include <linux/bitfield.h>
10 #include <linux/clk.h>
11 #include <linux/err.h>
12 #include <linux/io.h>
13 #include <linux/ktime.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/platform_device.h>
17 #include <linux/reset.h>
18 #include <linux/rtc.h>
19
20 #define RTC_REG_NAME "rtc"
21
22 #define RTC_CTRL 0x40
23 #define TIMER_FREEZE_MASK_BIT BIT(5 + 16)
24 #define TIMER_FREEZE BIT(5)
25 #define DIS_SYS_RST_RTC_MASK_BIT BIT(4 + 16)
26 #define DIS_SYS_RST_RTC BIT(4)
27 #define RTC32K_MODE_RESET_MASK_BIT BIT(3 + 16)
28 #define RTC32K_MODE_RESET BIT(3)
29 #define ALARM_EN_OVERDUE_MASK_BIT BIT(2 + 16)
30 #define ALARM_EN_OVERDUE BIT(2)
31 #define ALARM_EN_PMC_MASK_BIT BIT(1 + 16)
32 #define ALARM_EN_PMC BIT(1)
33 #define ALARM_EN_MASK_BIT BIT(0 + 16)
34 #define ALARM_EN BIT(0)
35 #define RTC_TIMER_OUT 0x44
36 #define RTC_DIVIDER 0x48
37 #define RTC_TIMER_SET 0x4c
38 #define RTC_ALARM_SET 0x50
39 #define RTC_USER_DATA 0x54
40 #define RTC_RESET_RECORD 0x58
41 #define RTC_BATT_CHARGE_CTRL 0x5c
42 #define BAT_CHARGE_RSEL_MASK_BIT GENMASK(3 + 16, 2 + 16)
43 #define BAT_CHARGE_RSEL_MASK GENMASK(3, 2)
44 #define BAT_CHARGE_RSEL_2K_OHM FIELD_PREP(BAT_CHARGE_RSEL_MASK, 0)
45 #define BAT_CHARGE_RSEL_250_OHM FIELD_PREP(BAT_CHARGE_RSEL_MASK, 1)
46 #define BAT_CHARGE_RSEL_50_OHM FIELD_PREP(BAT_CHARGE_RSEL_MASK, 2)
47 #define BAT_CHARGE_RSEL_0_OHM FIELD_PREP(BAT_CHARGE_RSEL_MASK, 3)
48 #define BAT_CHARGE_DSEL_MASK_BIT BIT(1 + 16)
49 #define BAT_CHARGE_DSEL_MASK GENMASK(1, 1)
50 #define BAT_CHARGE_DSEL_ON FIELD_PREP(BAT_CHARGE_DSEL_MASK, 0)
51 #define BAT_CHARGE_DSEL_OFF FIELD_PREP(BAT_CHARGE_DSEL_MASK, 1)
52 #define BAT_CHARGE_EN_MASK_BIT BIT(0 + 16)
53 #define BAT_CHARGE_EN BIT(0)
54 #define RTC_TRIM_CTRL 0x60
55
56 struct sunplus_rtc {
57 struct rtc_device *rtc;
58 struct resource *res;
59 struct clk *rtcclk;
60 struct reset_control *rstc;
61 void __iomem *reg_base;
62 int irq;
63 };
64
sp_get_seconds(struct device * dev,unsigned long * secs)65 static void sp_get_seconds(struct device *dev, unsigned long *secs)
66 {
67 struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
68
69 *secs = (unsigned long)readl(sp_rtc->reg_base + RTC_TIMER_OUT);
70 }
71
sp_set_seconds(struct device * dev,unsigned long secs)72 static void sp_set_seconds(struct device *dev, unsigned long secs)
73 {
74 struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
75
76 writel((u32)secs, sp_rtc->reg_base + RTC_TIMER_SET);
77 }
78
sp_rtc_read_time(struct device * dev,struct rtc_time * tm)79 static int sp_rtc_read_time(struct device *dev, struct rtc_time *tm)
80 {
81 unsigned long secs;
82
83 sp_get_seconds(dev, &secs);
84 rtc_time64_to_tm(secs, tm);
85
86 return 0;
87 }
88
sp_rtc_set_time(struct device * dev,struct rtc_time * tm)89 static int sp_rtc_set_time(struct device *dev, struct rtc_time *tm)
90 {
91 unsigned long secs;
92
93 secs = rtc_tm_to_time64(tm);
94 dev_dbg(dev, "%s, secs = %lu\n", __func__, secs);
95 sp_set_seconds(dev, secs);
96
97 return 0;
98 }
99
sp_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)100 static int sp_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
101 {
102 struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
103 unsigned long alarm_time;
104
105 alarm_time = rtc_tm_to_time64(&alrm->time);
106 dev_dbg(dev, "%s, alarm_time: %u\n", __func__, (u32)(alarm_time));
107 writel((u32)alarm_time, sp_rtc->reg_base + RTC_ALARM_SET);
108
109 return 0;
110 }
111
sp_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)112 static int sp_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
113 {
114 struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
115 unsigned int alarm_time;
116
117 alarm_time = readl(sp_rtc->reg_base + RTC_ALARM_SET);
118 dev_dbg(dev, "%s, alarm_time: %u\n", __func__, alarm_time);
119
120 if (alarm_time == 0)
121 alrm->enabled = 0;
122 else
123 alrm->enabled = 1;
124
125 rtc_time64_to_tm((unsigned long)(alarm_time), &alrm->time);
126
127 return 0;
128 }
129
sp_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)130 static int sp_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
131 {
132 struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
133
134 if (enabled)
135 writel((TIMER_FREEZE_MASK_BIT | DIS_SYS_RST_RTC_MASK_BIT |
136 RTC32K_MODE_RESET_MASK_BIT | ALARM_EN_OVERDUE_MASK_BIT |
137 ALARM_EN_PMC_MASK_BIT | ALARM_EN_MASK_BIT) |
138 (DIS_SYS_RST_RTC | ALARM_EN_OVERDUE | ALARM_EN_PMC | ALARM_EN),
139 sp_rtc->reg_base + RTC_CTRL);
140 else
141 writel((ALARM_EN_OVERDUE_MASK_BIT | ALARM_EN_PMC_MASK_BIT | ALARM_EN_MASK_BIT) |
142 0x0, sp_rtc->reg_base + RTC_CTRL);
143
144 return 0;
145 }
146
147 static const struct rtc_class_ops sp_rtc_ops = {
148 .read_time = sp_rtc_read_time,
149 .set_time = sp_rtc_set_time,
150 .set_alarm = sp_rtc_set_alarm,
151 .read_alarm = sp_rtc_read_alarm,
152 .alarm_irq_enable = sp_rtc_alarm_irq_enable,
153 };
154
sp_rtc_irq_handler(int irq,void * dev_id)155 static irqreturn_t sp_rtc_irq_handler(int irq, void *dev_id)
156 {
157 struct platform_device *plat_dev = dev_id;
158 struct sunplus_rtc *sp_rtc = dev_get_drvdata(&plat_dev->dev);
159
160 rtc_update_irq(sp_rtc->rtc, 1, RTC_IRQF | RTC_AF);
161 dev_dbg(&plat_dev->dev, "[RTC] ALARM INT\n");
162
163 return IRQ_HANDLED;
164 }
165
166 /*
167 * -------------------------------------------------------------------------------------
168 * bat_charge_rsel bat_charge_dsel bat_charge_en Remarks
169 * x x 0 Disable
170 * 0 0 1 0.86mA (2K Ohm with diode)
171 * 1 0 1 1.81mA (250 Ohm with diode)
172 * 2 0 1 2.07mA (50 Ohm with diode)
173 * 3 0 1 16.0mA (0 Ohm with diode)
174 * 0 1 1 1.36mA (2K Ohm without diode)
175 * 1 1 1 3.99mA (250 Ohm without diode)
176 * 2 1 1 4.41mA (50 Ohm without diode)
177 * 3 1 1 16.0mA (0 Ohm without diode)
178 * -------------------------------------------------------------------------------------
179 */
sp_rtc_set_trickle_charger(struct device dev)180 static void sp_rtc_set_trickle_charger(struct device dev)
181 {
182 struct sunplus_rtc *sp_rtc = dev_get_drvdata(&dev);
183 u32 ohms, rsel;
184 u32 chargeable;
185
186 if (of_property_read_u32(dev.of_node, "trickle-resistor-ohms", &ohms) ||
187 of_property_read_u32(dev.of_node, "aux-voltage-chargeable", &chargeable)) {
188 dev_warn(&dev, "battery charger disabled\n");
189 return;
190 }
191
192 switch (ohms) {
193 case 2000:
194 rsel = BAT_CHARGE_RSEL_2K_OHM;
195 break;
196 case 250:
197 rsel = BAT_CHARGE_RSEL_250_OHM;
198 break;
199 case 50:
200 rsel = BAT_CHARGE_RSEL_50_OHM;
201 break;
202 case 0:
203 rsel = BAT_CHARGE_RSEL_0_OHM;
204 break;
205 default:
206 dev_err(&dev, "invalid charger resistor value (%d)\n", ohms);
207 return;
208 }
209
210 writel(BAT_CHARGE_RSEL_MASK_BIT | rsel, sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
211
212 switch (chargeable) {
213 case 0:
214 writel(BAT_CHARGE_DSEL_MASK_BIT | BAT_CHARGE_DSEL_OFF,
215 sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
216 break;
217 case 1:
218 writel(BAT_CHARGE_DSEL_MASK_BIT | BAT_CHARGE_DSEL_ON,
219 sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
220 break;
221 default:
222 dev_err(&dev, "invalid aux-voltage-chargeable value (%d)\n", chargeable);
223 return;
224 }
225
226 writel(BAT_CHARGE_EN_MASK_BIT | BAT_CHARGE_EN, sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
227 }
228
sp_rtc_probe(struct platform_device * plat_dev)229 static int sp_rtc_probe(struct platform_device *plat_dev)
230 {
231 struct sunplus_rtc *sp_rtc;
232 int ret;
233
234 sp_rtc = devm_kzalloc(&plat_dev->dev, sizeof(*sp_rtc), GFP_KERNEL);
235 if (!sp_rtc)
236 return -ENOMEM;
237
238 sp_rtc->res = platform_get_resource_byname(plat_dev, IORESOURCE_MEM, RTC_REG_NAME);
239 sp_rtc->reg_base = devm_ioremap_resource(&plat_dev->dev, sp_rtc->res);
240 if (IS_ERR(sp_rtc->reg_base))
241 return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->reg_base),
242 "%s devm_ioremap_resource fail\n", RTC_REG_NAME);
243 dev_dbg(&plat_dev->dev, "res = 0x%x, reg_base = 0x%lx\n",
244 sp_rtc->res->start, (unsigned long)sp_rtc->reg_base);
245
246 sp_rtc->irq = platform_get_irq(plat_dev, 0);
247 if (sp_rtc->irq < 0)
248 return dev_err_probe(&plat_dev->dev, sp_rtc->irq, "platform_get_irq failed\n");
249
250 ret = devm_request_irq(&plat_dev->dev, sp_rtc->irq, sp_rtc_irq_handler,
251 IRQF_TRIGGER_RISING, "rtc irq", plat_dev);
252 if (ret)
253 return dev_err_probe(&plat_dev->dev, ret, "devm_request_irq failed:\n");
254
255 sp_rtc->rtcclk = devm_clk_get(&plat_dev->dev, NULL);
256 if (IS_ERR(sp_rtc->rtcclk))
257 return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->rtcclk),
258 "devm_clk_get fail\n");
259
260 sp_rtc->rstc = devm_reset_control_get_exclusive(&plat_dev->dev, NULL);
261 if (IS_ERR(sp_rtc->rstc))
262 return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->rstc),
263 "failed to retrieve reset controller\n");
264
265 ret = clk_prepare_enable(sp_rtc->rtcclk);
266 if (ret)
267 goto free_clk;
268
269 ret = reset_control_deassert(sp_rtc->rstc);
270 if (ret)
271 goto free_reset_assert;
272
273 device_init_wakeup(&plat_dev->dev, 1);
274 dev_set_drvdata(&plat_dev->dev, sp_rtc);
275
276 sp_rtc->rtc = devm_rtc_allocate_device(&plat_dev->dev);
277 if (IS_ERR(sp_rtc->rtc)) {
278 ret = PTR_ERR(sp_rtc->rtc);
279 goto free_reset_assert;
280 }
281
282 sp_rtc->rtc->range_max = U32_MAX;
283 sp_rtc->rtc->range_min = 0;
284 sp_rtc->rtc->ops = &sp_rtc_ops;
285
286 ret = devm_rtc_register_device(sp_rtc->rtc);
287 if (ret)
288 goto free_reset_assert;
289
290 /* Setup trickle charger */
291 if (plat_dev->dev.of_node)
292 sp_rtc_set_trickle_charger(plat_dev->dev);
293
294 /* Keep RTC from system reset */
295 writel(DIS_SYS_RST_RTC_MASK_BIT | DIS_SYS_RST_RTC, sp_rtc->reg_base + RTC_CTRL);
296
297 return 0;
298
299 free_reset_assert:
300 reset_control_assert(sp_rtc->rstc);
301 free_clk:
302 clk_disable_unprepare(sp_rtc->rtcclk);
303
304 return ret;
305 }
306
sp_rtc_remove(struct platform_device * plat_dev)307 static int sp_rtc_remove(struct platform_device *plat_dev)
308 {
309 struct sunplus_rtc *sp_rtc = dev_get_drvdata(&plat_dev->dev);
310
311 device_init_wakeup(&plat_dev->dev, 0);
312 reset_control_assert(sp_rtc->rstc);
313 clk_disable_unprepare(sp_rtc->rtcclk);
314
315 return 0;
316 }
317
318 #ifdef CONFIG_PM_SLEEP
sp_rtc_suspend(struct device * dev)319 static int sp_rtc_suspend(struct device *dev)
320 {
321 struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
322
323 if (device_may_wakeup(dev))
324 enable_irq_wake(sp_rtc->irq);
325
326 return 0;
327 }
328
sp_rtc_resume(struct device * dev)329 static int sp_rtc_resume(struct device *dev)
330 {
331 struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
332
333 if (device_may_wakeup(dev))
334 disable_irq_wake(sp_rtc->irq);
335
336 return 0;
337 }
338 #endif
339
340 static const struct of_device_id sp_rtc_of_match[] = {
341 { .compatible = "sunplus,sp7021-rtc" },
342 { /* sentinel */ }
343 };
344 MODULE_DEVICE_TABLE(of, sp_rtc_of_match);
345
346 static SIMPLE_DEV_PM_OPS(sp_rtc_pm_ops, sp_rtc_suspend, sp_rtc_resume);
347
348 static struct platform_driver sp_rtc_driver = {
349 .probe = sp_rtc_probe,
350 .remove = sp_rtc_remove,
351 .driver = {
352 .name = "sp7021-rtc",
353 .of_match_table = sp_rtc_of_match,
354 .pm = &sp_rtc_pm_ops,
355 },
356 };
357 module_platform_driver(sp_rtc_driver);
358
359 MODULE_AUTHOR("Vincent Shih <vincent.sunplus@gmail.com>");
360 MODULE_DESCRIPTION("Sunplus RTC driver");
361 MODULE_LICENSE("GPL v2");
362
363