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Searched refs:RS2 (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/arch/sparc/crypto/
Dopcodes.h12 #define RS2(x) (FPD_ENCODE(x) << 0) macro
19 .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c));
31 .word (F3F(2, 0x19, 0)|RS1(a)|RS2(b)|RS3(c)|RD(d));
33 .word (F3F(2, 0x19, 1)|RS1(a)|RS2(b)|RS3(c)|RD(d));
35 .word (F3F(2, 0x19, 2)|RS1(a)|RS2(b)|RS3(c)|RD(d));
37 .word (F3F(2, 0x19, 3)|RS1(a)|RS2(b)|RS3(c)|RD(d));
39 .word (F3F(2, 0x19, 4)|RS1(a)|RS2(b)|RS3(c)|RD(d));
41 .word (F3F(2, 0x19, 5)|RS1(a)|RS2(b)|RS3(c)|RD(d));
43 .word (F3F(2, 0x19, 6)|RS1(a)|RS2(b)|RS3(c)|RD(d));
45 .word (F3F(2, 0x19, 7)|RS1(a)|RS2(b)|RS3(c)|RD(d));
[all …]
/linux-6.1.9/arch/sparc/kernel/
Dvisemul.c137 #define RS2(INSN) (((INSN) >> 0) & 0x1f) macro
299 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in edge()
301 orig_rs2 = rs2 = fetch_reg(RS2(insn), regs); in edge()
377 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in array()
379 rs2 = fetch_reg(RS2(insn), regs); in array()
410 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in bmask()
412 rs2 = fetch_reg(RS2(insn), regs); in bmask()
431 rs2 = fpd_regval(f, RS2(insn)); in bshuffle()
455 rs2 = fpd_regval(f, RS2(insn)); in pdist()
488 rs2 = fpd_regval(f, RS2(insn)); in pformat()
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/linux-6.1.9/arch/riscv/include/asm/
Dinsn-def.h94 __RD(0), RS1(vaddr), RS2(asid))
98 __RD(0), RS1(gaddr), RS2(vmid))
119 __RD(0), RS1(vaddr), RS2(asid))
131 __RD(0), RS1(vaddr), RS2(asid))
135 __RD(0), RS1(gaddr), RS2(vmid))
/linux-6.1.9/arch/sparc/net/
Dbpf_jit_comp_64.c56 #define RS2(X) ((X)) macro
263 emit(OR | RS1(G0) | RS2(from) | RD(to), ctx); in emit_reg_move()
290 emit(opcode | RS1(dst) | RS2(src) | RD(dst), ctx); in emit_alu()
295 emit(opcode | RS1(a) | RS2(b) | RD(c), ctx); in emit_alu3()
313 emit(insn | RS2(tmp), ctx); in emit_alu_K()
332 emit(insn | RS2(tmp), ctx); in emit_alu3_K()
613 emit(OR | RS1(dest) | RS2(tmp) | RD(dest), ctx); in emit_loadimm64()
632 emit(cb_opc | WDISP10(off << 2) | RS1(dst) | RS2(src), ctx); in emit_cbcond()
647 emit(SUBCC | RS1(R1) | RS2(R2) | RD(G0), CTX)
653 emit(ANDCC | RS1(R1) | RS2(R2) | RD(G0), CTX)
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Dbpf_jit_comp_32.c27 #define RS2(X) ((X)) macro
113 *prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A); \
118 *prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO); \
123 *prog++ = OR | RS1(G0) | RS2(G0) | RD(REG); \
140 *prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A); \
166 *prog++ = _insn | RS2(r_TMP); \
262 *prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0))
268 *prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0))
274 *prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))
280 *prog++ = (ADD | RS1(R1) | RS2(R2) | RD(R3))
[all …]