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Searched refs:RREG8 (Results 1 – 16 of 16) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/mgag200/
Dmgag200_bmc.c18 tmp = RREG8(DAC_DATA); in mgag200_bmc_disable_vidrst()
24 tmp = RREG8(DAC_DATA); in mgag200_bmc_disable_vidrst()
34 tmp = RREG8(DAC_DATA); in mgag200_bmc_disable_vidrst()
45 tmp = RREG8(DAC_DATA); in mgag200_bmc_disable_vidrst()
59 tmp = RREG8(DAC_DATA); in mgag200_bmc_disable_vidrst()
72 tmp = RREG8(MGAREG_CRTCEXT_DATA); in mgag200_bmc_enable_vidrst()
77 tmp = RREG8(DAC_DATA); in mgag200_bmc_enable_vidrst()
90 tmp = RREG8(DAC_DATA); in mgag200_bmc_enable_vidrst()
96 tmp = RREG8(DAC_DATA); in mgag200_bmc_enable_vidrst()
Dmgag200_g200wb.c118 tmp = RREG8(MGAREG_CRTC_DATA); in mgag200_g200wb_pixpllc_atomic_update()
125 tmp = RREG8(DAC_DATA); in mgag200_g200wb_pixpllc_atomic_update()
130 tmp = RREG8(DAC_DATA); in mgag200_g200wb_pixpllc_atomic_update()
135 tmp = RREG8(MGAREG_MEM_MISC_READ); in mgag200_g200wb_pixpllc_atomic_update()
140 tmp = RREG8(DAC_DATA); in mgag200_g200wb_pixpllc_atomic_update()
148 tmp = RREG8(DAC_DATA); in mgag200_g200wb_pixpllc_atomic_update()
163 tmp = RREG8(DAC_DATA); in mgag200_g200wb_pixpllc_atomic_update()
171 tmp = RREG8(DAC_DATA); in mgag200_g200wb_pixpllc_atomic_update()
177 tmp = RREG8(DAC_DATA); in mgag200_g200wb_pixpllc_atomic_update()
184 tmp = RREG8(MGAREG_SEQ_DATA); in mgag200_g200wb_pixpllc_atomic_update()
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Dmgag200_g200ev.c122 tmp = RREG8(DAC_DATA); in mgag200_g200ev_pixpllc_atomic_update()
126 tmp = RREG8(MGAREG_MEM_MISC_READ); in mgag200_g200ev_pixpllc_atomic_update()
131 tmp = RREG8(DAC_DATA); in mgag200_g200ev_pixpllc_atomic_update()
135 tmp = RREG8(DAC_DATA); in mgag200_g200ev_pixpllc_atomic_update()
146 tmp = RREG8(DAC_DATA); in mgag200_g200ev_pixpllc_atomic_update()
153 tmp = RREG8(DAC_DATA); in mgag200_g200ev_pixpllc_atomic_update()
159 tmp = RREG8(DAC_DATA); in mgag200_g200ev_pixpllc_atomic_update()
162 tmp = RREG8(MGAREG_MEM_MISC_READ); in mgag200_g200ev_pixpllc_atomic_update()
167 tmp = RREG8(DAC_DATA); in mgag200_g200ev_pixpllc_atomic_update()
Dmgag200_g200eh.c118 tmp = RREG8(DAC_DATA); in mgag200_g200eh_pixpllc_atomic_update()
122 tmp = RREG8(MGAREG_MEM_MISC_READ); in mgag200_g200eh_pixpllc_atomic_update()
127 tmp = RREG8(DAC_DATA); in mgag200_g200eh_pixpllc_atomic_update()
140 tmp = RREG8(DAC_DATA); in mgag200_g200eh_pixpllc_atomic_update()
146 tmp = RREG8(DAC_DATA); in mgag200_g200eh_pixpllc_atomic_update()
151 vcount = RREG8(MGAREG_VCOUNT); in mgag200_g200eh_pixpllc_atomic_update()
154 tmpcount = RREG8(MGAREG_VCOUNT); in mgag200_g200eh_pixpllc_atomic_update()
Dmgag200_drv.h38 #define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg)) macro
52 ((v) = RREG8(MGA_MISC_IN))
66 RREG8(0x1fda); \
74 v = RREG8(MGAREG_SEQ_DATA); \
86 v = RREG8(MGAREG_CRTC_DATA); \
98 v = RREG8(MGAREG_CRTCEXT_DATA); \
Dmgag200_g200er.c143 tmp = RREG8(DAC_DATA); in mgag200_g200er_pixpllc_atomic_update()
148 tmp = RREG8(DAC_DATA); in mgag200_g200er_pixpllc_atomic_update()
152 tmp = RREG8(MGAREG_MEM_MISC_READ); in mgag200_g200er_pixpllc_atomic_update()
157 tmp = RREG8(DAC_DATA); in mgag200_g200er_pixpllc_atomic_update()
Dmgag200_i2c.c39 return RREG8(DAC_DATA); in mga_i2c_read_gpio()
47 tmp = (RREG8(DAC_DATA) & mask) | val; in mga_i2c_set_gpio()
Dmgag200_mode.c126 status = RREG8(MGAREG_Status + 2); in mga_wait_busy()
197 misc = RREG8(MGA_MISC_IN); in mgag200_init_registers()
223 misc = RREG8(MGA_MISC_IN); in mgag200_set_mode_regs()
Dmgag200_drv.c181 misc = RREG8(MGA_MISC_IN); in mgag200_device_init()
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dmxgpu_ai.c79 return RREG8(AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE) & 2; in xgpu_ai_peek_ack()
88 reg = RREG8(AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE); in xgpu_ai_poll_ack()
Dmxgpu_nv.c77 return RREG8(NV_MAIBOX_CONTROL_TRN_OFFSET_BYTE) & 2; in xgpu_nv_peek_ack()
86 reg = RREG8(NV_MAIBOX_CONTROL_TRN_OFFSET_BYTE); in xgpu_nv_poll_ack()
Damdgpu.h1144 #define RREG8(reg) amdgpu_mm_rreg8(adev, (reg)) macro
/linux-6.1.9/drivers/gpu/drm/radeon/
Dradeon_legacy_tv.c293 if (RREG8(RADEON_CLOCK_CNTL_DATA + 3) >= cnt_threshold) in radeon_wait_pll_lock()
Dr100.c3777 save->GENMO_WT = RREG8(R_0003C2_GENMO_WT); in r100_mc_stop()
3830 tmp = RREG8(R_0003C2_GENMO_WT); in r100_vga_render_disable()
Dradeon_combios.c1146 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; in radeon_legacy_get_lvds_info_from_regs()
Dradeon.h2538 #define RREG8(reg) readb((rdev->rmmio) + (reg)) macro