Searched refs:RISCV_RELEASE_BARRIER (Results 1 – 3 of 3) sorted by relevance
6 #define RISCV_RELEASE_BARRIER "\tfence rw, w\n" macro9 #define RISCV_RELEASE_BARRIER macro
90 RISCV_RELEASE_BARRIER \98 RISCV_RELEASE_BARRIER \266 RISCV_RELEASE_BARRIER \278 RISCV_RELEASE_BARRIER \
26 __asm__ __volatile__(RISCV_RELEASE_BARRIER "" ::: "memory");