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Searched refs:REG_GET_2 (Results 1 – 25 of 30) sorted by relevance

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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hpo_dp_link_encoder.c459 REG_GET_2(DP_DPHY_SYM32_SAT_VC0, in dcn31_hpo_dp_link_enc_read_state()
462 REG_GET_2(DP_DPHY_SYM32_SAT_VC1, in dcn31_hpo_dp_link_enc_read_state()
465 REG_GET_2(DP_DPHY_SYM32_SAT_VC2, in dcn31_hpo_dp_link_enc_read_state()
468 REG_GET_2(DP_DPHY_SYM32_SAT_VC3, in dcn31_hpo_dp_link_enc_read_state()
472 REG_GET_2(DP_DPHY_SYM32_VC_RATE_CNTL0, in dcn31_hpo_dp_link_enc_read_state()
475 REG_GET_2(DP_DPHY_SYM32_VC_RATE_CNTL1, in dcn31_hpo_dp_link_enc_read_state()
478 REG_GET_2(DP_DPHY_SYM32_VC_RATE_CNTL2, in dcn31_hpo_dp_link_enc_read_state()
481 REG_GET_2(DP_DPHY_SYM32_VC_RATE_CNTL3, in dcn31_hpo_dp_link_enc_read_state()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_dccg.c62 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg314_get_pixel_rate_div()
67 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg314_get_pixel_rate_div()
72 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg314_get_pixel_rate_div()
77 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg314_get_pixel_rate_div()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_dccg.c59 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg32_get_pixel_rate_div()
64 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg32_get_pixel_rate_div()
69 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg32_get_pixel_rate_div()
74 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg32_get_pixel_rate_div()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubp.c903 REG_GET_2(BLANK_OFFSET_0, in hubp1_read_state_common()
913 REG_GET_2(DST_AFTER_SCALER, in hubp1_read_state_common()
918 REG_GET_2(PREFETCH_SETTINS, in hubp1_read_state_common()
922 REG_GET_2(PREFETCH_SETTINGS, in hubp1_read_state_common()
926 REG_GET_2(VBLANK_PARAMETERS_0, in hubp1_read_state_common()
954 REG_GET_2(PER_LINE_DELIVERY_PRE, in hubp1_read_state_common()
958 REG_GET_2(PER_LINE_DELIVERY, in hubp1_read_state_common()
990 REG_GET_2(DCN_TTU_QOS_WM, in hubp1_read_state_common()
994 REG_GET_2(DCN_GLOBAL_TTU_CNTL, in hubp1_read_state_common()
1029 REG_GET_2(DCSURF_PRI_VIEWPORT_DIMENSION, in hubp1_read_state_common()
[all …]
Ddcn10_optc.c451 REG_GET_2(OTG_BLANK_CONTROL, in optc1_is_blanked()
675 REG_GET_2(OTG_STATUS_POSITION, in optc1_get_position()
1225 REG_GET_2(OTG_V_BLANK_START_END, in optc1_get_crtc_scanoutpos()
1323 REG_GET_2(OTG_V_BLANK_START_END, in optc1_read_otg_state()
1345 REG_GET_2(OTG_V_SYNC_A, in optc1_read_otg_state()
1349 REG_GET_2(OTG_H_BLANK_START_END, in optc1_read_otg_state()
1353 REG_GET_2(OTG_H_SYNC_A, in optc1_read_otg_state()
1397 REG_GET_2(OTG_V_BLANK_START_END, in optc1_get_otg_active_size()
1401 REG_GET_2(OTG_H_BLANK_START_END, in optc1_get_otg_active_size()
1519 REG_GET_2(OTG_CRC0_DATA_RG, in optc1_get_crc()
Ddcn10_mpc.c170 REG_GET_2(MPCC_STATUS[mpcc_id], in mpc1_assert_mpcc_idle_before_connect()
471 REG_GET_2(MPCC_STATUS[mpcc_inst], MPCC_IDLE, &s->idle, in mpc1_read_mpcc_state()
Ddcn10_stream_encoder.c1517 REG_GET_2(DP_PIXEL_FORMAT, in enc1_stream_encoder_dp_get_pixel_format()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.c1128 REG_GET_2(BLANK_OFFSET_0, in hubp2_read_state_common()
1138 REG_GET_2(DST_AFTER_SCALER, in hubp2_read_state_common()
1143 REG_GET_2(PREFETCH_SETTINS, in hubp2_read_state_common()
1147 REG_GET_2(PREFETCH_SETTINGS, in hubp2_read_state_common()
1151 REG_GET_2(VBLANK_PARAMETERS_0, in hubp2_read_state_common()
1179 REG_GET_2(PER_LINE_DELIVERY_PRE, in hubp2_read_state_common()
1183 REG_GET_2(PER_LINE_DELIVERY, in hubp2_read_state_common()
1215 REG_GET_2(DCN_TTU_QOS_WM, in hubp2_read_state_common()
1219 REG_GET_2(DCN_GLOBAL_TTU_CNTL, in hubp2_read_state_common()
1254 REG_GET_2(DCSURF_PRI_VIEWPORT_DIMENSION, in hubp2_read_state_common()
[all …]
Ddcn20_dccg.c85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
Ddcn20_opp.c329 REG_GET_2(DPG_CONTROL, in opp2_dpg_is_blanked()
Ddcn20_dsc.c169 REG_GET_2(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN, &s->dsc_fw_en, in dsc2_read_state()
245REG_GET_2(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN, &dsc_fw_config, DSCRM_DSC_OPP_PIPE_SOURC… in dsc2_enable()
270REG_GET_2(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN, &dsc_fw_config, DSCRM_DSC_OPP_PIPE_SOURC… in dsc2_disable()
Ddcn20_hubbub.c547 REG_GET_2(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, &ref_div, in hubbub2_get_dchub_ref_freq()
Ddcn20_dpp_cm.c921 REG_GET_2(CM_3DLUT_READ_WRITE_CONTROL, in get3dlut_config()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/
Ddce_panel_cntl.c152 REG_GET_2(PWRSEQ_CNTL, LVTMA_BLON, &blon, LVTMA_BLON_OVRD, &blon_ovrd); in dce_is_panel_backlight_on()
168 REG_GET_2(PWRSEQ_CNTL, LVTMA_DIGON, &dig_on, LVTMA_DIGON_OVRD, &dig_on_ovrd); in dce_is_panel_powered_on()
205 REG_GET_2(BL_PWM_PERIOD_CNTL, in dce_driver_set_backlight()
Ddce_i2c_hw.c274 REG_GET_2(MICROSECOND_TIME_BASE_DIV, MICROSECOND_TIME_BASE_DIV, &ref_base_div, in set_speed()
Ddce_aux.c477REG_GET_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, &prev_length, AUX_RX_TIMEOUT_LEN_MUL, &prev_mu… in dce_aux_configure_timeout()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_optc.c71 REG_GET_2(OTG_V_BLANK_START_END, in optc3_lock_doublebuffer_enable()
74 REG_GET_2(OTG_H_BLANK_START_END, in optc3_lock_doublebuffer_enable()
Ddcn30_dwb_cm.c153 REG_GET_2(DWB_OGAM_CONTROL, in dwb3_get_ogam_current()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c355 REG_GET_2(BLANK_OFFSET_0, in hubp21_validate_dml_output()
362 REG_GET_2(DST_AFTER_SCALER, in hubp21_validate_dml_output()
403 REG_GET_2(PER_LINE_DELIVERY, in hubp21_validate_dml_output()
406 REG_GET_2(PER_LINE_DELIVERY_PRE, in hubp21_validate_dml_output()
476 REG_GET_2(DCN_TTU_QOS_WM, in hubp21_validate_dml_output()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_link_encoder.c60 REG_GET_2(RDPCSTX_PHY_CNTL2, RDPCS_PHY_DPALT_DISABLE, &value1, in dcn201_link_encoder_get_max_link_cap()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_panel_cntl.c175 REG_GET_2(PWRSEQ_CNTL, PANEL_DIGON, &dig_on, PANEL_DIGON_OVRD, &dig_on_ovrd); in dcn301_is_panel_powered_on()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/gpio/
Dhw_ddc.c113 REG_GET_2(gpio.MASK_reg, in set_config()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_resource.c443 REG_GET_2(CC_DC_HDMI_STRAPS, in read_dce_straps()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h160 #define REG_GET_2(reg_name, f1, v1, f2, v2) \ macro
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_resource.c471 REG_GET_2(CC_DC_HDMI_STRAPS, in read_dce_straps()

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