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Searched refs:REG_A6XX_GMU_HOST2GMU_INTR_SET (Results 1 – 3 of 3) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/msm/adreno/
Da6xx_gmu.xml.h337 #define REG_A6XX_GMU_HOST2GMU_INTR_SET 0x00005194 macro
Da6xx_hfi.c96 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01); in a6xx_hfi_queue_write()
Da6xx_gmu.c320 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << request); in a6xx_gmu_set_oob()
353 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << bit); in a6xx_gmu_clear_oob()