Searched refs:REG_A5XX_CP_IB1_BASE_HI (Results 1 – 2 of 2) sorted by relevance
1242 gpu_read64(gpu, REG_A5XX_CP_IB1_BASE, REG_A5XX_CP_IB1_BASE_HI), in a5xx_fault_detect_irq()
1024 #define REG_A5XX_CP_IB1_BASE_HI 0x00000b20 macro