Searched refs:REG_A4XX_RBBM_CLOCK_CTL_TSE_RAS_RBBM (Results 1 – 2 of 2) sorted by relevance
140 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL_TSE_RAS_RBBM, 0x00222222); in a4xx_enable_hwcg()
1581 #define REG_A4XX_RBBM_CLOCK_CTL_TSE_RAS_RBBM 0x0000001d macro