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Searched refs:RCS0 (Results 1 – 20 of 20) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/gvt/
Dmmio_context.c49 {RCS0, RING_MODE_GEN7(RENDER_RING_BASE), 0xffff, false}, /* 0x229c */
50 {RCS0, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
51 {RCS0, HWSTAM, 0x0, false}, /* 0x2098 */
52 {RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
53 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
54 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
55 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
56 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
57 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
58 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 5), 0, false}, /* 0x24e4 */
[all …]
Dscheduler.c101 if (workload->engine->id != RCS0) in sr_oa_regs()
165 if (workload->engine->id == RCS0) { in populate_shadow_context()
218 if (IS_BROADWELL(gvt->gt->i915) && workload->engine->id == RCS0) in populate_shadow_context()
505 if (workload->engine->id == RCS0 && in intel_gvt_scan_and_shadow_workload()
977 if (IS_BROADWELL(rq->engine->i915) && rq->engine->id == RCS0) in update_guest_context()
1703 if (engine->id == RCS0) { in intel_vgpu_create_workload()
Dexeclist.c49 [RCS0] = RCS_AS_CONTEXT_SWITCH,
Dcmd_parser.c423 #define R_RCS BIT(RCS0)
595 [RCS0] = {
1049 if (IS_BROADWELL(s->engine->i915) && s->engine->id != RCS0) { in cmd_handler_lri()
1150 [RCS0] = {
Dhandlers.c320 engine_mask |= BIT(RCS0); in gdrst_mmio_write()
2075 id = RCS0; in gvt_reg_tlb_control_handler()
/linux-6.1.9/drivers/gpu/drm/i915/
Di915_pci.c186 .__runtime.platform_engine_mask = BIT(RCS0), \
207 .__runtime.platform_engine_mask = BIT(RCS0), \
245 .__runtime.platform_engine_mask = BIT(RCS0), \
337 .__runtime.platform_engine_mask = BIT(RCS0), \
370 .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
380 .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
389 .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0), \
421 .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
474 .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
547 .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0),
[all …]
Di915_drv.h790 ENGINE_INSTANCES_MASK(gt, RCS0, I915_MAX_RCS)
Di915_irq.c4080 intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir); in i8xx_irq_handler()
4188 intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir); in i915_irq_handler()
4333 intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], in i965_irq_handler()
Di915_gpu_error.c1282 case RCS0: in engine_record_registers()
/linux-6.1.9/drivers/gpu/drm/i915/selftests/
Dmock_gem_device.c216 to_gt(i915)->engine[RCS0] = mock_engine(i915, "mock", RCS0); in mock_gem_device()
217 if (!to_gt(i915)->engine[RCS0]) in mock_gem_device()
220 if (mock_engine_init(to_gt(i915)->engine[RCS0])) in mock_gem_device()
Di915_request.c218 ce = i915_gem_context_get_engine(ctx[0], RCS0); in igt_request_rewind()
236 ce = i915_gem_context_get_engine(ctx[1], RCS0); in igt_request_rewind()
/linux-6.1.9/drivers/gpu/drm/i915/gt/
Dselftest_gt_pm.c109 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in live_gt_clocks()
Dintel_engine_cs.c61 [RCS0] = {
392 [RCS0] = GEN11_GRDOM_RENDER, in get_reset_domain()
424 [RCS0] = GEN6_GRDOM_RENDER, in get_reset_domain()
1530 [RCS0] = MSG_IDLE_CS, in __cs_pending_mi_force_wakes()
1616 if (engine->id != RCS0) in intel_engine_get_instdone()
1650 if (engine->id != RCS0) in intel_engine_get_instdone()
1662 if (engine->id == RCS0) in intel_engine_get_instdone()
Dintel_engine_types.h109 RCS0 = 0, enumerator
Dintel_engine_user.c163 [RENDER_CLASS] = { RCS0, 1 }, in legacy_ring_idx()
Dintel_mocs.c568 [RCS0] = __GEN9_RCS0_MOCS0, in mocs_offset()
Dintel_ring_submission.c91 case RCS0: in set_hwsp()
938 GEM_BUG_ON(engine->id != RCS0); in switch_context()
Dintel_execlists_submission.c3493 [RCS0] = GEN8_RCS_IRQ_SHIFT, in logical_ring_default_irqs()
/linux-6.1.9/drivers/gpu/drm/i915/gem/
Di915_gem_execbuffer.c2218 if (GRAPHICS_VER(rq->engine->i915) != 7 || rq->engine->id != RCS0) { in i915_reset_gen7_sol_offsets()
2470 [I915_EXEC_DEFAULT] = RCS0,
2471 [I915_EXEC_RENDER] = RCS0,
/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_overlay.c1392 engine = to_gt(dev_priv)->engine[RCS0]; in intel_overlay_setup()