1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/seq_file.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61 #include <linux/synclink.h>
62
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cistpl.h>
73 #include <pcmcia/cisreg.h>
74 #include <pcmcia/ds.h>
75
76 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
77 #define SYNCLINK_GENERIC_HDLC 1
78 #else
79 #define SYNCLINK_GENERIC_HDLC 0
80 #endif
81
82 #define GET_USER(error,value,addr) error = get_user(value,addr)
83 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
84 #define PUT_USER(error,value,addr) error = put_user(value,addr)
85 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
86
87 #include <linux/uaccess.h>
88
89 static MGSL_PARAMS default_params = {
90 MGSL_MODE_HDLC, /* unsigned long mode */
91 0, /* unsigned char loopback; */
92 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
93 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
94 0, /* unsigned long clock_speed; */
95 0xff, /* unsigned char addr_filter; */
96 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
97 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
98 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
99 9600, /* unsigned long data_rate; */
100 8, /* unsigned char data_bits; */
101 1, /* unsigned char stop_bits; */
102 ASYNC_PARITY_NONE /* unsigned char parity; */
103 };
104
105 typedef struct {
106 int count;
107 unsigned char status;
108 char data[1];
109 } RXBUF;
110
111 /* The queue of BH actions to be performed */
112
113 #define BH_RECEIVE 1
114 #define BH_TRANSMIT 2
115 #define BH_STATUS 4
116
117 #define IO_PIN_SHUTDOWN_LIMIT 100
118
119 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
120
121 struct _input_signal_events {
122 int ri_up;
123 int ri_down;
124 int dsr_up;
125 int dsr_down;
126 int dcd_up;
127 int dcd_down;
128 int cts_up;
129 int cts_down;
130 };
131
132
133 /*
134 * Device instance data structure
135 */
136
137 typedef struct _mgslpc_info {
138 struct tty_port port;
139 void *if_ptr; /* General purpose pointer (used by SPPP) */
140 int magic;
141 int line;
142
143 struct mgsl_icount icount;
144
145 int timeout;
146 int x_char; /* xon/xoff character */
147 unsigned char read_status_mask;
148 unsigned char ignore_status_mask;
149
150 unsigned char *tx_buf;
151 int tx_put;
152 int tx_get;
153 int tx_count;
154
155 /* circular list of fixed length rx buffers */
156
157 unsigned char *rx_buf; /* memory allocated for all rx buffers */
158 int rx_buf_total_size; /* size of memory allocated for rx buffers */
159 int rx_put; /* index of next empty rx buffer */
160 int rx_get; /* index of next full rx buffer */
161 int rx_buf_size; /* size in bytes of single rx buffer */
162 int rx_buf_count; /* total number of rx buffers */
163 int rx_frame_count; /* number of full rx buffers */
164
165 wait_queue_head_t status_event_wait_q;
166 wait_queue_head_t event_wait_q;
167 struct timer_list tx_timer; /* HDLC transmit timeout timer */
168 struct _mgslpc_info *next_device; /* device list link */
169
170 unsigned short imra_value;
171 unsigned short imrb_value;
172 unsigned char pim_value;
173
174 spinlock_t lock;
175 struct work_struct task; /* task structure for scheduling bh */
176
177 u32 max_frame_size;
178
179 u32 pending_bh;
180
181 bool bh_running;
182 bool bh_requested;
183
184 int dcd_chkcount; /* check counts to prevent */
185 int cts_chkcount; /* too many IRQs if a signal */
186 int dsr_chkcount; /* is floating */
187 int ri_chkcount;
188
189 bool rx_enabled;
190 bool rx_overflow;
191
192 bool tx_enabled;
193 bool tx_active;
194 bool tx_aborting;
195 u32 idle_mode;
196
197 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
198
199 char device_name[25]; /* device instance name */
200
201 unsigned int io_base; /* base I/O address of adapter */
202 unsigned int irq_level;
203
204 MGSL_PARAMS params; /* communications parameters */
205
206 unsigned char serial_signals; /* current serial signal states */
207
208 bool irq_occurred; /* for diagnostics use */
209 char testing_irq;
210 unsigned int init_error; /* startup error (DIAGS) */
211
212 char *flag_buf;
213 bool drop_rts_on_tx_done;
214
215 struct _input_signal_events input_signal_events;
216
217 /* PCMCIA support */
218 struct pcmcia_device *p_dev;
219 int stop;
220
221 /* SPPP/Cisco HDLC device parts */
222 int netcount;
223 spinlock_t netlock;
224
225 #if SYNCLINK_GENERIC_HDLC
226 struct net_device *netdev;
227 #endif
228
229 } MGSLPC_INFO;
230
231 #define MGSLPC_MAGIC 0x5402
232
233 /*
234 * The size of the serial xmit buffer is 1 page, or 4096 bytes
235 */
236 #define TXBUFSIZE 4096
237
238
239 #define CHA 0x00 /* channel A offset */
240 #define CHB 0x40 /* channel B offset */
241
242 /*
243 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
244 */
245 #undef PVR
246
247 #define RXFIFO 0
248 #define TXFIFO 0
249 #define STAR 0x20
250 #define CMDR 0x20
251 #define RSTA 0x21
252 #define PRE 0x21
253 #define MODE 0x22
254 #define TIMR 0x23
255 #define XAD1 0x24
256 #define XAD2 0x25
257 #define RAH1 0x26
258 #define RAH2 0x27
259 #define DAFO 0x27
260 #define RAL1 0x28
261 #define RFC 0x28
262 #define RHCR 0x29
263 #define RAL2 0x29
264 #define RBCL 0x2a
265 #define XBCL 0x2a
266 #define RBCH 0x2b
267 #define XBCH 0x2b
268 #define CCR0 0x2c
269 #define CCR1 0x2d
270 #define CCR2 0x2e
271 #define CCR3 0x2f
272 #define VSTR 0x34
273 #define BGR 0x34
274 #define RLCR 0x35
275 #define AML 0x36
276 #define AMH 0x37
277 #define GIS 0x38
278 #define IVA 0x38
279 #define IPC 0x39
280 #define ISR 0x3a
281 #define IMR 0x3a
282 #define PVR 0x3c
283 #define PIS 0x3d
284 #define PIM 0x3d
285 #define PCR 0x3e
286 #define CCR4 0x3f
287
288 // IMR/ISR
289
290 #define IRQ_BREAK_ON BIT15 // rx break detected
291 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
292 #define IRQ_ALLSENT BIT13 // all sent
293 #define IRQ_UNDERRUN BIT12 // transmit data underrun
294 #define IRQ_TIMER BIT11 // timer interrupt
295 #define IRQ_CTS BIT10 // CTS status change
296 #define IRQ_TXREPEAT BIT9 // tx message repeat
297 #define IRQ_TXFIFO BIT8 // transmit pool ready
298 #define IRQ_RXEOM BIT7 // receive message end
299 #define IRQ_EXITHUNT BIT6 // receive frame start
300 #define IRQ_RXTIME BIT6 // rx char timeout
301 #define IRQ_DCD BIT2 // carrier detect status change
302 #define IRQ_OVERRUN BIT1 // receive frame overflow
303 #define IRQ_RXFIFO BIT0 // receive pool full
304
305 // STAR
306
307 #define XFW BIT6 // transmit FIFO write enable
308 #define CEC BIT2 // command executing
309 #define CTS BIT1 // CTS state
310
311 #define PVR_DTR BIT0
312 #define PVR_DSR BIT1
313 #define PVR_RI BIT2
314 #define PVR_AUTOCTS BIT3
315 #define PVR_RS232 0x20 /* 0010b */
316 #define PVR_V35 0xe0 /* 1110b */
317 #define PVR_RS422 0x40 /* 0100b */
318
319 /* Register access functions */
320
321 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
322 #define read_reg(info, reg) inb((info)->io_base + (reg))
323
324 #define read_reg16(info, reg) inw((info)->io_base + (reg))
325 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
326
327 #define set_reg_bits(info, reg, mask) \
328 write_reg(info, (reg), \
329 (unsigned char) (read_reg(info, (reg)) | (mask)))
330 #define clear_reg_bits(info, reg, mask) \
331 write_reg(info, (reg), \
332 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
333 /*
334 * interrupt enable/disable routines
335 */
irq_disable(MGSLPC_INFO * info,unsigned char channel,unsigned short mask)336 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
337 {
338 if (channel == CHA) {
339 info->imra_value |= mask;
340 write_reg16(info, CHA + IMR, info->imra_value);
341 } else {
342 info->imrb_value |= mask;
343 write_reg16(info, CHB + IMR, info->imrb_value);
344 }
345 }
irq_enable(MGSLPC_INFO * info,unsigned char channel,unsigned short mask)346 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
347 {
348 if (channel == CHA) {
349 info->imra_value &= ~mask;
350 write_reg16(info, CHA + IMR, info->imra_value);
351 } else {
352 info->imrb_value &= ~mask;
353 write_reg16(info, CHB + IMR, info->imrb_value);
354 }
355 }
356
357 #define port_irq_disable(info, mask) \
358 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
359
360 #define port_irq_enable(info, mask) \
361 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
362
363 static void rx_start(MGSLPC_INFO *info);
364 static void rx_stop(MGSLPC_INFO *info);
365
366 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
367 static void tx_stop(MGSLPC_INFO *info);
368 static void tx_set_idle(MGSLPC_INFO *info);
369
370 static void get_signals(MGSLPC_INFO *info);
371 static void set_signals(MGSLPC_INFO *info);
372
373 static void reset_device(MGSLPC_INFO *info);
374
375 static void hdlc_mode(MGSLPC_INFO *info);
376 static void async_mode(MGSLPC_INFO *info);
377
378 static void tx_timeout(struct timer_list *t);
379
380 static int carrier_raised(struct tty_port *port);
381 static void dtr_rts(struct tty_port *port, int onoff);
382
383 #if SYNCLINK_GENERIC_HDLC
384 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
385 static void hdlcdev_tx_done(MGSLPC_INFO *info);
386 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
387 static int hdlcdev_init(MGSLPC_INFO *info);
388 static void hdlcdev_exit(MGSLPC_INFO *info);
389 #endif
390
391 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
392
393 static bool register_test(MGSLPC_INFO *info);
394 static bool irq_test(MGSLPC_INFO *info);
395 static int adapter_test(MGSLPC_INFO *info);
396
397 static int claim_resources(MGSLPC_INFO *info);
398 static void release_resources(MGSLPC_INFO *info);
399 static int mgslpc_add_device(MGSLPC_INFO *info);
400 static void mgslpc_remove_device(MGSLPC_INFO *info);
401
402 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
403 static void rx_reset_buffers(MGSLPC_INFO *info);
404 static int rx_alloc_buffers(MGSLPC_INFO *info);
405 static void rx_free_buffers(MGSLPC_INFO *info);
406
407 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
408
409 /*
410 * Bottom half interrupt handlers
411 */
412 static void bh_handler(struct work_struct *work);
413 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
414 static void bh_status(MGSLPC_INFO *info);
415
416 /*
417 * ioctl handlers
418 */
419 static int tiocmget(struct tty_struct *tty);
420 static int tiocmset(struct tty_struct *tty,
421 unsigned int set, unsigned int clear);
422 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
423 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
424 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
425 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
426 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
427 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
428 static int tx_abort(MGSLPC_INFO *info);
429 static int set_rxenable(MGSLPC_INFO *info, int enable);
430 static int wait_events(MGSLPC_INFO *info, int __user *mask);
431
432 static MGSLPC_INFO *mgslpc_device_list = NULL;
433 static int mgslpc_device_count = 0;
434
435 /*
436 * Set this param to non-zero to load eax with the
437 * .text section address and breakpoint on module load.
438 * This is useful for use with gdb and add-symbol-file command.
439 */
440 static bool break_on_load;
441
442 /*
443 * Driver major number, defaults to zero to get auto
444 * assigned major number. May be forced as module parameter.
445 */
446 static int ttymajor=0;
447
448 static int debug_level = 0;
449 static int maxframe[MAX_DEVICE_COUNT] = {0,};
450
451 module_param(break_on_load, bool, 0);
452 module_param(ttymajor, int, 0);
453 module_param(debug_level, int, 0);
454 module_param_array(maxframe, int, NULL, 0);
455
456 MODULE_LICENSE("GPL");
457
458 static char *driver_name = "SyncLink PC Card driver";
459 static char *driver_version = "$Revision: 4.34 $";
460
461 static struct tty_driver *serial_driver;
462
463 /* number of characters left in xmit buffer before we ask for more */
464 #define WAKEUP_CHARS 256
465
466 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
467 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
468
469 /* PCMCIA prototypes */
470
471 static int mgslpc_config(struct pcmcia_device *link);
472 static void mgslpc_release(u_long arg);
473 static void mgslpc_detach(struct pcmcia_device *p_dev);
474
475 /*
476 * 1st function defined in .text section. Calling this function in
477 * init_module() followed by a breakpoint allows a remote debugger
478 * (gdb) to get the .text address for the add-symbol-file command.
479 * This allows remote debugging of dynamically loadable modules.
480 */
mgslpc_get_text_ptr(void)481 static void* mgslpc_get_text_ptr(void)
482 {
483 return mgslpc_get_text_ptr;
484 }
485
486 /**
487 * line discipline callback wrappers
488 *
489 * The wrappers maintain line discipline references
490 * while calling into the line discipline.
491 *
492 * ldisc_receive_buf - pass receive data to line discipline
493 */
494
ldisc_receive_buf(struct tty_struct * tty,const __u8 * data,char * flags,int count)495 static void ldisc_receive_buf(struct tty_struct *tty,
496 const __u8 *data, char *flags, int count)
497 {
498 struct tty_ldisc *ld;
499 if (!tty)
500 return;
501 ld = tty_ldisc_ref(tty);
502 if (ld) {
503 if (ld->ops->receive_buf)
504 ld->ops->receive_buf(tty, data, flags, count);
505 tty_ldisc_deref(ld);
506 }
507 }
508
509 static const struct tty_port_operations mgslpc_port_ops = {
510 .carrier_raised = carrier_raised,
511 .dtr_rts = dtr_rts
512 };
513
mgslpc_probe(struct pcmcia_device * link)514 static int mgslpc_probe(struct pcmcia_device *link)
515 {
516 MGSLPC_INFO *info;
517 int ret;
518
519 if (debug_level >= DEBUG_LEVEL_INFO)
520 printk("mgslpc_attach\n");
521
522 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
523 if (!info) {
524 printk("Error can't allocate device instance data\n");
525 return -ENOMEM;
526 }
527
528 info->magic = MGSLPC_MAGIC;
529 tty_port_init(&info->port);
530 info->port.ops = &mgslpc_port_ops;
531 INIT_WORK(&info->task, bh_handler);
532 info->max_frame_size = 4096;
533 init_waitqueue_head(&info->status_event_wait_q);
534 init_waitqueue_head(&info->event_wait_q);
535 spin_lock_init(&info->lock);
536 spin_lock_init(&info->netlock);
537 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
538 info->idle_mode = HDLC_TXIDLE_FLAGS;
539 info->imra_value = 0xffff;
540 info->imrb_value = 0xffff;
541 info->pim_value = 0xff;
542
543 info->p_dev = link;
544 link->priv = info;
545
546 /* Initialize the struct pcmcia_device structure */
547
548 ret = mgslpc_config(link);
549 if (ret != 0)
550 goto failed;
551
552 ret = mgslpc_add_device(info);
553 if (ret != 0)
554 goto failed_release;
555
556 return 0;
557
558 failed_release:
559 mgslpc_release((u_long)link);
560 failed:
561 tty_port_destroy(&info->port);
562 kfree(info);
563 return ret;
564 }
565
566 /* Card has been inserted.
567 */
568
mgslpc_ioprobe(struct pcmcia_device * p_dev,void * priv_data)569 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
570 {
571 return pcmcia_request_io(p_dev);
572 }
573
mgslpc_config(struct pcmcia_device * link)574 static int mgslpc_config(struct pcmcia_device *link)
575 {
576 MGSLPC_INFO *info = link->priv;
577 int ret;
578
579 if (debug_level >= DEBUG_LEVEL_INFO)
580 printk("mgslpc_config(0x%p)\n", link);
581
582 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
583
584 ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
585 if (ret != 0)
586 goto failed;
587
588 link->config_index = 8;
589 link->config_regs = PRESENT_OPTION;
590
591 ret = pcmcia_request_irq(link, mgslpc_isr);
592 if (ret)
593 goto failed;
594 ret = pcmcia_enable_device(link);
595 if (ret)
596 goto failed;
597
598 info->io_base = link->resource[0]->start;
599 info->irq_level = link->irq;
600 return 0;
601
602 failed:
603 mgslpc_release((u_long)link);
604 return -ENODEV;
605 }
606
607 /* Card has been removed.
608 * Unregister device and release PCMCIA configuration.
609 * If device is open, postpone until it is closed.
610 */
mgslpc_release(u_long arg)611 static void mgslpc_release(u_long arg)
612 {
613 struct pcmcia_device *link = (struct pcmcia_device *)arg;
614
615 if (debug_level >= DEBUG_LEVEL_INFO)
616 printk("mgslpc_release(0x%p)\n", link);
617
618 pcmcia_disable_device(link);
619 }
620
mgslpc_detach(struct pcmcia_device * link)621 static void mgslpc_detach(struct pcmcia_device *link)
622 {
623 if (debug_level >= DEBUG_LEVEL_INFO)
624 printk("mgslpc_detach(0x%p)\n", link);
625
626 ((MGSLPC_INFO *)link->priv)->stop = 1;
627 mgslpc_release((u_long)link);
628
629 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
630 }
631
mgslpc_suspend(struct pcmcia_device * link)632 static int mgslpc_suspend(struct pcmcia_device *link)
633 {
634 MGSLPC_INFO *info = link->priv;
635
636 info->stop = 1;
637
638 return 0;
639 }
640
mgslpc_resume(struct pcmcia_device * link)641 static int mgslpc_resume(struct pcmcia_device *link)
642 {
643 MGSLPC_INFO *info = link->priv;
644
645 info->stop = 0;
646
647 return 0;
648 }
649
650
mgslpc_paranoia_check(MGSLPC_INFO * info,char * name,const char * routine)651 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
652 char *name, const char *routine)
653 {
654 #ifdef MGSLPC_PARANOIA_CHECK
655 static const char *badmagic =
656 "Warning: bad magic number for mgsl struct (%s) in %s\n";
657 static const char *badinfo =
658 "Warning: null mgslpc_info for (%s) in %s\n";
659
660 if (!info) {
661 printk(badinfo, name, routine);
662 return true;
663 }
664 if (info->magic != MGSLPC_MAGIC) {
665 printk(badmagic, name, routine);
666 return true;
667 }
668 #else
669 if (!info)
670 return true;
671 #endif
672 return false;
673 }
674
675
676 #define CMD_RXFIFO BIT7 // release current rx FIFO
677 #define CMD_RXRESET BIT6 // receiver reset
678 #define CMD_RXFIFO_READ BIT5
679 #define CMD_START_TIMER BIT4
680 #define CMD_TXFIFO BIT3 // release current tx FIFO
681 #define CMD_TXEOM BIT1 // transmit end message
682 #define CMD_TXRESET BIT0 // transmit reset
683
wait_command_complete(MGSLPC_INFO * info,unsigned char channel)684 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
685 {
686 int i = 0;
687 /* wait for command completion */
688 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
689 udelay(1);
690 if (i++ == 1000)
691 return false;
692 }
693 return true;
694 }
695
issue_command(MGSLPC_INFO * info,unsigned char channel,unsigned char cmd)696 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
697 {
698 wait_command_complete(info, channel);
699 write_reg(info, (unsigned char) (channel + CMDR), cmd);
700 }
701
tx_pause(struct tty_struct * tty)702 static void tx_pause(struct tty_struct *tty)
703 {
704 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
705 unsigned long flags;
706
707 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
708 return;
709 if (debug_level >= DEBUG_LEVEL_INFO)
710 printk("tx_pause(%s)\n", info->device_name);
711
712 spin_lock_irqsave(&info->lock, flags);
713 if (info->tx_enabled)
714 tx_stop(info);
715 spin_unlock_irqrestore(&info->lock, flags);
716 }
717
tx_release(struct tty_struct * tty)718 static void tx_release(struct tty_struct *tty)
719 {
720 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
721 unsigned long flags;
722
723 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
724 return;
725 if (debug_level >= DEBUG_LEVEL_INFO)
726 printk("tx_release(%s)\n", info->device_name);
727
728 spin_lock_irqsave(&info->lock, flags);
729 if (!info->tx_enabled)
730 tx_start(info, tty);
731 spin_unlock_irqrestore(&info->lock, flags);
732 }
733
734 /* Return next bottom half action to perform.
735 * or 0 if nothing to do.
736 */
bh_action(MGSLPC_INFO * info)737 static int bh_action(MGSLPC_INFO *info)
738 {
739 unsigned long flags;
740 int rc = 0;
741
742 spin_lock_irqsave(&info->lock, flags);
743
744 if (info->pending_bh & BH_RECEIVE) {
745 info->pending_bh &= ~BH_RECEIVE;
746 rc = BH_RECEIVE;
747 } else if (info->pending_bh & BH_TRANSMIT) {
748 info->pending_bh &= ~BH_TRANSMIT;
749 rc = BH_TRANSMIT;
750 } else if (info->pending_bh & BH_STATUS) {
751 info->pending_bh &= ~BH_STATUS;
752 rc = BH_STATUS;
753 }
754
755 if (!rc) {
756 /* Mark BH routine as complete */
757 info->bh_running = false;
758 info->bh_requested = false;
759 }
760
761 spin_unlock_irqrestore(&info->lock, flags);
762
763 return rc;
764 }
765
bh_handler(struct work_struct * work)766 static void bh_handler(struct work_struct *work)
767 {
768 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
769 struct tty_struct *tty;
770 int action;
771
772 if (debug_level >= DEBUG_LEVEL_BH)
773 printk("%s(%d):bh_handler(%s) entry\n",
774 __FILE__,__LINE__,info->device_name);
775
776 info->bh_running = true;
777 tty = tty_port_tty_get(&info->port);
778
779 while((action = bh_action(info)) != 0) {
780
781 /* Process work item */
782 if (debug_level >= DEBUG_LEVEL_BH)
783 printk("%s(%d):bh_handler() work item action=%d\n",
784 __FILE__,__LINE__,action);
785
786 switch (action) {
787
788 case BH_RECEIVE:
789 while(rx_get_frame(info, tty));
790 break;
791 case BH_TRANSMIT:
792 bh_transmit(info, tty);
793 break;
794 case BH_STATUS:
795 bh_status(info);
796 break;
797 default:
798 /* unknown work item ID */
799 printk("Unknown work item ID=%08X!\n", action);
800 break;
801 }
802 }
803
804 tty_kref_put(tty);
805 if (debug_level >= DEBUG_LEVEL_BH)
806 printk("%s(%d):bh_handler(%s) exit\n",
807 __FILE__,__LINE__,info->device_name);
808 }
809
bh_transmit(MGSLPC_INFO * info,struct tty_struct * tty)810 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
811 {
812 if (debug_level >= DEBUG_LEVEL_BH)
813 printk("bh_transmit() entry on %s\n", info->device_name);
814
815 if (tty)
816 tty_wakeup(tty);
817 }
818
bh_status(MGSLPC_INFO * info)819 static void bh_status(MGSLPC_INFO *info)
820 {
821 info->ri_chkcount = 0;
822 info->dsr_chkcount = 0;
823 info->dcd_chkcount = 0;
824 info->cts_chkcount = 0;
825 }
826
827 /* eom: non-zero = end of frame */
rx_ready_hdlc(MGSLPC_INFO * info,int eom)828 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
829 {
830 unsigned char data[2];
831 unsigned char fifo_count, read_count, i;
832 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
833
834 if (debug_level >= DEBUG_LEVEL_ISR)
835 printk("%s(%d):rx_ready_hdlc(eom=%d)\n", __FILE__, __LINE__, eom);
836
837 if (!info->rx_enabled)
838 return;
839
840 if (info->rx_frame_count >= info->rx_buf_count) {
841 /* no more free buffers */
842 issue_command(info, CHA, CMD_RXRESET);
843 info->pending_bh |= BH_RECEIVE;
844 info->rx_overflow = true;
845 info->icount.buf_overrun++;
846 return;
847 }
848
849 if (eom) {
850 /* end of frame, get FIFO count from RBCL register */
851 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
852 if (fifo_count == 0)
853 fifo_count = 32;
854 } else
855 fifo_count = 32;
856
857 do {
858 if (fifo_count == 1) {
859 read_count = 1;
860 data[0] = read_reg(info, CHA + RXFIFO);
861 } else {
862 read_count = 2;
863 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
864 }
865 fifo_count -= read_count;
866 if (!fifo_count && eom)
867 buf->status = data[--read_count];
868
869 for (i = 0; i < read_count; i++) {
870 if (buf->count >= info->max_frame_size) {
871 /* frame too large, reset receiver and reset current buffer */
872 issue_command(info, CHA, CMD_RXRESET);
873 buf->count = 0;
874 return;
875 }
876 *(buf->data + buf->count) = data[i];
877 buf->count++;
878 }
879 } while (fifo_count);
880
881 if (eom) {
882 info->pending_bh |= BH_RECEIVE;
883 info->rx_frame_count++;
884 info->rx_put++;
885 if (info->rx_put >= info->rx_buf_count)
886 info->rx_put = 0;
887 }
888 issue_command(info, CHA, CMD_RXFIFO);
889 }
890
rx_ready_async(MGSLPC_INFO * info,int tcd)891 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
892 {
893 struct tty_port *port = &info->port;
894 unsigned char data, status, flag;
895 int fifo_count;
896 int work = 0;
897 struct mgsl_icount *icount = &info->icount;
898
899 if (tcd) {
900 /* early termination, get FIFO count from RBCL register */
901 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
902
903 /* Zero fifo count could mean 0 or 32 bytes available.
904 * If BIT5 of STAR is set then at least 1 byte is available.
905 */
906 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
907 fifo_count = 32;
908 } else
909 fifo_count = 32;
910
911 tty_buffer_request_room(port, fifo_count);
912 /* Flush received async data to receive data buffer. */
913 while (fifo_count) {
914 data = read_reg(info, CHA + RXFIFO);
915 status = read_reg(info, CHA + RXFIFO);
916 fifo_count -= 2;
917
918 icount->rx++;
919 flag = TTY_NORMAL;
920
921 // if no frameing/crc error then save data
922 // BIT7:parity error
923 // BIT6:framing error
924
925 if (status & (BIT7 | BIT6)) {
926 if (status & BIT7)
927 icount->parity++;
928 else
929 icount->frame++;
930
931 /* discard char if tty control flags say so */
932 if (status & info->ignore_status_mask)
933 continue;
934
935 status &= info->read_status_mask;
936
937 if (status & BIT7)
938 flag = TTY_PARITY;
939 else if (status & BIT6)
940 flag = TTY_FRAME;
941 }
942 work += tty_insert_flip_char(port, data, flag);
943 }
944 issue_command(info, CHA, CMD_RXFIFO);
945
946 if (debug_level >= DEBUG_LEVEL_ISR) {
947 printk("%s(%d):rx_ready_async",
948 __FILE__,__LINE__);
949 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
950 __FILE__,__LINE__,icount->rx,icount->brk,
951 icount->parity,icount->frame,icount->overrun);
952 }
953
954 if (work)
955 tty_flip_buffer_push(port);
956 }
957
958
tx_done(MGSLPC_INFO * info,struct tty_struct * tty)959 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
960 {
961 if (!info->tx_active)
962 return;
963
964 info->tx_active = false;
965 info->tx_aborting = false;
966
967 if (info->params.mode == MGSL_MODE_ASYNC)
968 return;
969
970 info->tx_count = info->tx_put = info->tx_get = 0;
971 del_timer(&info->tx_timer);
972
973 if (info->drop_rts_on_tx_done) {
974 get_signals(info);
975 if (info->serial_signals & SerialSignal_RTS) {
976 info->serial_signals &= ~SerialSignal_RTS;
977 set_signals(info);
978 }
979 info->drop_rts_on_tx_done = false;
980 }
981
982 #if SYNCLINK_GENERIC_HDLC
983 if (info->netcount)
984 hdlcdev_tx_done(info);
985 else
986 #endif
987 {
988 if (tty && (tty->flow.stopped || tty->hw_stopped)) {
989 tx_stop(info);
990 return;
991 }
992 info->pending_bh |= BH_TRANSMIT;
993 }
994 }
995
tx_ready(MGSLPC_INFO * info,struct tty_struct * tty)996 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
997 {
998 unsigned char fifo_count = 32;
999 int c;
1000
1001 if (debug_level >= DEBUG_LEVEL_ISR)
1002 printk("%s(%d):tx_ready(%s)\n", __FILE__, __LINE__, info->device_name);
1003
1004 if (info->params.mode == MGSL_MODE_HDLC) {
1005 if (!info->tx_active)
1006 return;
1007 } else {
1008 if (tty && (tty->flow.stopped || tty->hw_stopped)) {
1009 tx_stop(info);
1010 return;
1011 }
1012 if (!info->tx_count)
1013 info->tx_active = false;
1014 }
1015
1016 if (!info->tx_count)
1017 return;
1018
1019 while (info->tx_count && fifo_count) {
1020 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1021
1022 if (c == 1) {
1023 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1024 } else {
1025 write_reg16(info, CHA + TXFIFO,
1026 *((unsigned short*)(info->tx_buf + info->tx_get)));
1027 }
1028 info->tx_count -= c;
1029 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1030 fifo_count -= c;
1031 }
1032
1033 if (info->params.mode == MGSL_MODE_ASYNC) {
1034 if (info->tx_count < WAKEUP_CHARS)
1035 info->pending_bh |= BH_TRANSMIT;
1036 issue_command(info, CHA, CMD_TXFIFO);
1037 } else {
1038 if (info->tx_count)
1039 issue_command(info, CHA, CMD_TXFIFO);
1040 else
1041 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1042 }
1043 }
1044
cts_change(MGSLPC_INFO * info,struct tty_struct * tty)1045 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1046 {
1047 get_signals(info);
1048 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1049 irq_disable(info, CHB, IRQ_CTS);
1050 info->icount.cts++;
1051 if (info->serial_signals & SerialSignal_CTS)
1052 info->input_signal_events.cts_up++;
1053 else
1054 info->input_signal_events.cts_down++;
1055 wake_up_interruptible(&info->status_event_wait_q);
1056 wake_up_interruptible(&info->event_wait_q);
1057
1058 if (tty && tty_port_cts_enabled(&info->port)) {
1059 if (tty->hw_stopped) {
1060 if (info->serial_signals & SerialSignal_CTS) {
1061 if (debug_level >= DEBUG_LEVEL_ISR)
1062 printk("CTS tx start...");
1063 tty->hw_stopped = 0;
1064 tx_start(info, tty);
1065 info->pending_bh |= BH_TRANSMIT;
1066 return;
1067 }
1068 } else {
1069 if (!(info->serial_signals & SerialSignal_CTS)) {
1070 if (debug_level >= DEBUG_LEVEL_ISR)
1071 printk("CTS tx stop...");
1072 tty->hw_stopped = 1;
1073 tx_stop(info);
1074 }
1075 }
1076 }
1077 info->pending_bh |= BH_STATUS;
1078 }
1079
dcd_change(MGSLPC_INFO * info,struct tty_struct * tty)1080 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1081 {
1082 get_signals(info);
1083 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1084 irq_disable(info, CHB, IRQ_DCD);
1085 info->icount.dcd++;
1086 if (info->serial_signals & SerialSignal_DCD) {
1087 info->input_signal_events.dcd_up++;
1088 }
1089 else
1090 info->input_signal_events.dcd_down++;
1091 #if SYNCLINK_GENERIC_HDLC
1092 if (info->netcount) {
1093 if (info->serial_signals & SerialSignal_DCD)
1094 netif_carrier_on(info->netdev);
1095 else
1096 netif_carrier_off(info->netdev);
1097 }
1098 #endif
1099 wake_up_interruptible(&info->status_event_wait_q);
1100 wake_up_interruptible(&info->event_wait_q);
1101
1102 if (tty_port_check_carrier(&info->port)) {
1103 if (debug_level >= DEBUG_LEVEL_ISR)
1104 printk("%s CD now %s...", info->device_name,
1105 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1106 if (info->serial_signals & SerialSignal_DCD)
1107 wake_up_interruptible(&info->port.open_wait);
1108 else {
1109 if (debug_level >= DEBUG_LEVEL_ISR)
1110 printk("doing serial hangup...");
1111 if (tty)
1112 tty_hangup(tty);
1113 }
1114 }
1115 info->pending_bh |= BH_STATUS;
1116 }
1117
dsr_change(MGSLPC_INFO * info)1118 static void dsr_change(MGSLPC_INFO *info)
1119 {
1120 get_signals(info);
1121 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1122 port_irq_disable(info, PVR_DSR);
1123 info->icount.dsr++;
1124 if (info->serial_signals & SerialSignal_DSR)
1125 info->input_signal_events.dsr_up++;
1126 else
1127 info->input_signal_events.dsr_down++;
1128 wake_up_interruptible(&info->status_event_wait_q);
1129 wake_up_interruptible(&info->event_wait_q);
1130 info->pending_bh |= BH_STATUS;
1131 }
1132
ri_change(MGSLPC_INFO * info)1133 static void ri_change(MGSLPC_INFO *info)
1134 {
1135 get_signals(info);
1136 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1137 port_irq_disable(info, PVR_RI);
1138 info->icount.rng++;
1139 if (info->serial_signals & SerialSignal_RI)
1140 info->input_signal_events.ri_up++;
1141 else
1142 info->input_signal_events.ri_down++;
1143 wake_up_interruptible(&info->status_event_wait_q);
1144 wake_up_interruptible(&info->event_wait_q);
1145 info->pending_bh |= BH_STATUS;
1146 }
1147
1148 /* Interrupt service routine entry point.
1149 *
1150 * Arguments:
1151 *
1152 * irq interrupt number that caused interrupt
1153 * dev_id device ID supplied during interrupt registration
1154 */
mgslpc_isr(int dummy,void * dev_id)1155 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1156 {
1157 MGSLPC_INFO *info = dev_id;
1158 struct tty_struct *tty;
1159 unsigned short isr;
1160 unsigned char gis, pis;
1161 int count=0;
1162
1163 if (debug_level >= DEBUG_LEVEL_ISR)
1164 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1165
1166 if (!(info->p_dev->_locked))
1167 return IRQ_HANDLED;
1168
1169 tty = tty_port_tty_get(&info->port);
1170
1171 spin_lock(&info->lock);
1172
1173 while ((gis = read_reg(info, CHA + GIS))) {
1174 if (debug_level >= DEBUG_LEVEL_ISR)
1175 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1176
1177 if ((gis & 0x70) || count > 1000) {
1178 printk("synclink_cs:hardware failed or ejected\n");
1179 break;
1180 }
1181 count++;
1182
1183 if (gis & (BIT1 | BIT0)) {
1184 isr = read_reg16(info, CHB + ISR);
1185 if (isr & IRQ_DCD)
1186 dcd_change(info, tty);
1187 if (isr & IRQ_CTS)
1188 cts_change(info, tty);
1189 }
1190 if (gis & (BIT3 | BIT2))
1191 {
1192 isr = read_reg16(info, CHA + ISR);
1193 if (isr & IRQ_TIMER) {
1194 info->irq_occurred = true;
1195 irq_disable(info, CHA, IRQ_TIMER);
1196 }
1197
1198 /* receive IRQs */
1199 if (isr & IRQ_EXITHUNT) {
1200 info->icount.exithunt++;
1201 wake_up_interruptible(&info->event_wait_q);
1202 }
1203 if (isr & IRQ_BREAK_ON) {
1204 info->icount.brk++;
1205 if (info->port.flags & ASYNC_SAK)
1206 do_SAK(tty);
1207 }
1208 if (isr & IRQ_RXTIME) {
1209 issue_command(info, CHA, CMD_RXFIFO_READ);
1210 }
1211 if (isr & (IRQ_RXEOM | IRQ_RXFIFO)) {
1212 if (info->params.mode == MGSL_MODE_HDLC)
1213 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1214 else
1215 rx_ready_async(info, isr & IRQ_RXEOM);
1216 }
1217
1218 /* transmit IRQs */
1219 if (isr & IRQ_UNDERRUN) {
1220 if (info->tx_aborting)
1221 info->icount.txabort++;
1222 else
1223 info->icount.txunder++;
1224 tx_done(info, tty);
1225 }
1226 else if (isr & IRQ_ALLSENT) {
1227 info->icount.txok++;
1228 tx_done(info, tty);
1229 }
1230 else if (isr & IRQ_TXFIFO)
1231 tx_ready(info, tty);
1232 }
1233 if (gis & BIT7) {
1234 pis = read_reg(info, CHA + PIS);
1235 if (pis & BIT1)
1236 dsr_change(info);
1237 if (pis & BIT2)
1238 ri_change(info);
1239 }
1240 }
1241
1242 /* Request bottom half processing if there's something
1243 * for it to do and the bh is not already running
1244 */
1245
1246 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1247 if (debug_level >= DEBUG_LEVEL_ISR)
1248 printk("%s(%d):%s queueing bh task.\n",
1249 __FILE__,__LINE__,info->device_name);
1250 schedule_work(&info->task);
1251 info->bh_requested = true;
1252 }
1253
1254 spin_unlock(&info->lock);
1255 tty_kref_put(tty);
1256
1257 if (debug_level >= DEBUG_LEVEL_ISR)
1258 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1259 __FILE__, __LINE__, info->irq_level);
1260
1261 return IRQ_HANDLED;
1262 }
1263
1264 /* Initialize and start device.
1265 */
startup(MGSLPC_INFO * info,struct tty_struct * tty)1266 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1267 {
1268 int retval = 0;
1269
1270 if (debug_level >= DEBUG_LEVEL_INFO)
1271 printk("%s(%d):startup(%s)\n", __FILE__, __LINE__, info->device_name);
1272
1273 if (tty_port_initialized(&info->port))
1274 return 0;
1275
1276 if (!info->tx_buf) {
1277 /* allocate a page of memory for a transmit buffer */
1278 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1279 if (!info->tx_buf) {
1280 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1281 __FILE__, __LINE__, info->device_name);
1282 return -ENOMEM;
1283 }
1284 }
1285
1286 info->pending_bh = 0;
1287
1288 memset(&info->icount, 0, sizeof(info->icount));
1289
1290 timer_setup(&info->tx_timer, tx_timeout, 0);
1291
1292 /* Allocate and claim adapter resources */
1293 retval = claim_resources(info);
1294
1295 /* perform existence check and diagnostics */
1296 if (!retval)
1297 retval = adapter_test(info);
1298
1299 if (retval) {
1300 if (capable(CAP_SYS_ADMIN) && tty)
1301 set_bit(TTY_IO_ERROR, &tty->flags);
1302 release_resources(info);
1303 return retval;
1304 }
1305
1306 /* program hardware for current parameters */
1307 mgslpc_change_params(info, tty);
1308
1309 if (tty)
1310 clear_bit(TTY_IO_ERROR, &tty->flags);
1311
1312 tty_port_set_initialized(&info->port, 1);
1313
1314 return 0;
1315 }
1316
1317 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1318 */
shutdown(MGSLPC_INFO * info,struct tty_struct * tty)1319 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1320 {
1321 unsigned long flags;
1322
1323 if (!tty_port_initialized(&info->port))
1324 return;
1325
1326 if (debug_level >= DEBUG_LEVEL_INFO)
1327 printk("%s(%d):mgslpc_shutdown(%s)\n",
1328 __FILE__, __LINE__, info->device_name);
1329
1330 /* clear status wait queue because status changes */
1331 /* can't happen after shutting down the hardware */
1332 wake_up_interruptible(&info->status_event_wait_q);
1333 wake_up_interruptible(&info->event_wait_q);
1334
1335 del_timer_sync(&info->tx_timer);
1336
1337 if (info->tx_buf) {
1338 free_page((unsigned long) info->tx_buf);
1339 info->tx_buf = NULL;
1340 }
1341
1342 spin_lock_irqsave(&info->lock, flags);
1343
1344 rx_stop(info);
1345 tx_stop(info);
1346
1347 /* TODO:disable interrupts instead of reset to preserve signal states */
1348 reset_device(info);
1349
1350 if (!tty || C_HUPCL(tty)) {
1351 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1352 set_signals(info);
1353 }
1354
1355 spin_unlock_irqrestore(&info->lock, flags);
1356
1357 release_resources(info);
1358
1359 if (tty)
1360 set_bit(TTY_IO_ERROR, &tty->flags);
1361
1362 tty_port_set_initialized(&info->port, 0);
1363 }
1364
mgslpc_program_hw(MGSLPC_INFO * info,struct tty_struct * tty)1365 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1366 {
1367 unsigned long flags;
1368
1369 spin_lock_irqsave(&info->lock, flags);
1370
1371 rx_stop(info);
1372 tx_stop(info);
1373 info->tx_count = info->tx_put = info->tx_get = 0;
1374
1375 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1376 hdlc_mode(info);
1377 else
1378 async_mode(info);
1379
1380 set_signals(info);
1381
1382 info->dcd_chkcount = 0;
1383 info->cts_chkcount = 0;
1384 info->ri_chkcount = 0;
1385 info->dsr_chkcount = 0;
1386
1387 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1388 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1389 get_signals(info);
1390
1391 if (info->netcount || (tty && C_CREAD(tty)))
1392 rx_start(info);
1393
1394 spin_unlock_irqrestore(&info->lock, flags);
1395 }
1396
1397 /* Reconfigure adapter based on new parameters
1398 */
mgslpc_change_params(MGSLPC_INFO * info,struct tty_struct * tty)1399 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1400 {
1401 unsigned cflag;
1402 int bits_per_char;
1403
1404 if (!tty)
1405 return;
1406
1407 if (debug_level >= DEBUG_LEVEL_INFO)
1408 printk("%s(%d):mgslpc_change_params(%s)\n",
1409 __FILE__, __LINE__, info->device_name);
1410
1411 cflag = tty->termios.c_cflag;
1412
1413 /* if B0 rate (hangup) specified then negate RTS and DTR */
1414 /* otherwise assert RTS and DTR */
1415 if (cflag & CBAUD)
1416 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
1417 else
1418 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1419
1420 /* byte size and parity */
1421 if ((cflag & CSIZE) != CS8) {
1422 cflag &= ~CSIZE;
1423 cflag |= CS7;
1424 tty->termios.c_cflag = cflag;
1425 }
1426 info->params.data_bits = tty_get_char_size(cflag);
1427
1428 if (cflag & CSTOPB)
1429 info->params.stop_bits = 2;
1430 else
1431 info->params.stop_bits = 1;
1432
1433 info->params.parity = ASYNC_PARITY_NONE;
1434 if (cflag & PARENB) {
1435 if (cflag & PARODD)
1436 info->params.parity = ASYNC_PARITY_ODD;
1437 else
1438 info->params.parity = ASYNC_PARITY_EVEN;
1439 if (cflag & CMSPAR)
1440 info->params.parity = ASYNC_PARITY_SPACE;
1441 }
1442
1443 /* calculate number of jiffies to transmit a full
1444 * FIFO (32 bytes) at specified data rate
1445 */
1446 bits_per_char = info->params.data_bits +
1447 info->params.stop_bits + 1;
1448
1449 /* if port data rate is set to 460800 or less then
1450 * allow tty settings to override, otherwise keep the
1451 * current data rate.
1452 */
1453 if (info->params.data_rate <= 460800) {
1454 info->params.data_rate = tty_get_baud_rate(tty);
1455 }
1456
1457 if (info->params.data_rate) {
1458 info->timeout = (32*HZ*bits_per_char) /
1459 info->params.data_rate;
1460 }
1461 info->timeout += HZ/50; /* Add .02 seconds of slop */
1462
1463 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
1464 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
1465
1466 /* process tty input control flags */
1467
1468 info->read_status_mask = 0;
1469 if (I_INPCK(tty))
1470 info->read_status_mask |= BIT7 | BIT6;
1471 if (I_IGNPAR(tty))
1472 info->ignore_status_mask |= BIT7 | BIT6;
1473
1474 mgslpc_program_hw(info, tty);
1475 }
1476
1477 /* Add a character to the transmit buffer
1478 */
mgslpc_put_char(struct tty_struct * tty,unsigned char ch)1479 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1480 {
1481 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1482 unsigned long flags;
1483
1484 if (debug_level >= DEBUG_LEVEL_INFO) {
1485 printk("%s(%d):mgslpc_put_char(%d) on %s\n",
1486 __FILE__, __LINE__, ch, info->device_name);
1487 }
1488
1489 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1490 return 0;
1491
1492 if (!info->tx_buf)
1493 return 0;
1494
1495 spin_lock_irqsave(&info->lock, flags);
1496
1497 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1498 if (info->tx_count < TXBUFSIZE - 1) {
1499 info->tx_buf[info->tx_put++] = ch;
1500 info->tx_put &= TXBUFSIZE-1;
1501 info->tx_count++;
1502 }
1503 }
1504
1505 spin_unlock_irqrestore(&info->lock, flags);
1506 return 1;
1507 }
1508
1509 /* Enable transmitter so remaining characters in the
1510 * transmit buffer are sent.
1511 */
mgslpc_flush_chars(struct tty_struct * tty)1512 static void mgslpc_flush_chars(struct tty_struct *tty)
1513 {
1514 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1515 unsigned long flags;
1516
1517 if (debug_level >= DEBUG_LEVEL_INFO)
1518 printk("%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1519 __FILE__, __LINE__, info->device_name, info->tx_count);
1520
1521 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1522 return;
1523
1524 if (info->tx_count <= 0 || tty->flow.stopped ||
1525 tty->hw_stopped || !info->tx_buf)
1526 return;
1527
1528 if (debug_level >= DEBUG_LEVEL_INFO)
1529 printk("%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1530 __FILE__, __LINE__, info->device_name);
1531
1532 spin_lock_irqsave(&info->lock, flags);
1533 if (!info->tx_active)
1534 tx_start(info, tty);
1535 spin_unlock_irqrestore(&info->lock, flags);
1536 }
1537
1538 /* Send a block of data
1539 *
1540 * Arguments:
1541 *
1542 * tty pointer to tty information structure
1543 * buf pointer to buffer containing send data
1544 * count size of send data in bytes
1545 *
1546 * Returns: number of characters written
1547 */
mgslpc_write(struct tty_struct * tty,const unsigned char * buf,int count)1548 static int mgslpc_write(struct tty_struct * tty,
1549 const unsigned char *buf, int count)
1550 {
1551 int c, ret = 0;
1552 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1553 unsigned long flags;
1554
1555 if (debug_level >= DEBUG_LEVEL_INFO)
1556 printk("%s(%d):mgslpc_write(%s) count=%d\n",
1557 __FILE__, __LINE__, info->device_name, count);
1558
1559 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1560 !info->tx_buf)
1561 goto cleanup;
1562
1563 if (info->params.mode == MGSL_MODE_HDLC) {
1564 if (count > TXBUFSIZE) {
1565 ret = -EIO;
1566 goto cleanup;
1567 }
1568 if (info->tx_active)
1569 goto cleanup;
1570 else if (info->tx_count)
1571 goto start;
1572 }
1573
1574 for (;;) {
1575 c = min(count,
1576 min(TXBUFSIZE - info->tx_count - 1,
1577 TXBUFSIZE - info->tx_put));
1578 if (c <= 0)
1579 break;
1580
1581 memcpy(info->tx_buf + info->tx_put, buf, c);
1582
1583 spin_lock_irqsave(&info->lock, flags);
1584 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1585 info->tx_count += c;
1586 spin_unlock_irqrestore(&info->lock, flags);
1587
1588 buf += c;
1589 count -= c;
1590 ret += c;
1591 }
1592 start:
1593 if (info->tx_count && !tty->flow.stopped && !tty->hw_stopped) {
1594 spin_lock_irqsave(&info->lock, flags);
1595 if (!info->tx_active)
1596 tx_start(info, tty);
1597 spin_unlock_irqrestore(&info->lock, flags);
1598 }
1599 cleanup:
1600 if (debug_level >= DEBUG_LEVEL_INFO)
1601 printk("%s(%d):mgslpc_write(%s) returning=%d\n",
1602 __FILE__, __LINE__, info->device_name, ret);
1603 return ret;
1604 }
1605
1606 /* Return the count of free bytes in transmit buffer
1607 */
mgslpc_write_room(struct tty_struct * tty)1608 static unsigned int mgslpc_write_room(struct tty_struct *tty)
1609 {
1610 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1611 int ret;
1612
1613 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1614 return 0;
1615
1616 if (info->params.mode == MGSL_MODE_HDLC) {
1617 /* HDLC (frame oriented) mode */
1618 if (info->tx_active)
1619 return 0;
1620 else
1621 return HDLC_MAX_FRAME_SIZE;
1622 } else {
1623 ret = TXBUFSIZE - info->tx_count - 1;
1624 if (ret < 0)
1625 ret = 0;
1626 }
1627
1628 if (debug_level >= DEBUG_LEVEL_INFO)
1629 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1630 __FILE__, __LINE__, info->device_name, ret);
1631 return ret;
1632 }
1633
1634 /* Return the count of bytes in transmit buffer
1635 */
mgslpc_chars_in_buffer(struct tty_struct * tty)1636 static unsigned int mgslpc_chars_in_buffer(struct tty_struct *tty)
1637 {
1638 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1639 unsigned int rc;
1640
1641 if (debug_level >= DEBUG_LEVEL_INFO)
1642 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1643 __FILE__, __LINE__, info->device_name);
1644
1645 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1646 return 0;
1647
1648 if (info->params.mode == MGSL_MODE_HDLC)
1649 rc = info->tx_active ? info->max_frame_size : 0;
1650 else
1651 rc = info->tx_count;
1652
1653 if (debug_level >= DEBUG_LEVEL_INFO)
1654 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%u\n",
1655 __FILE__, __LINE__, info->device_name, rc);
1656
1657 return rc;
1658 }
1659
1660 /* Discard all data in the send buffer
1661 */
mgslpc_flush_buffer(struct tty_struct * tty)1662 static void mgslpc_flush_buffer(struct tty_struct *tty)
1663 {
1664 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1665 unsigned long flags;
1666
1667 if (debug_level >= DEBUG_LEVEL_INFO)
1668 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1669 __FILE__, __LINE__, info->device_name);
1670
1671 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1672 return;
1673
1674 spin_lock_irqsave(&info->lock, flags);
1675 info->tx_count = info->tx_put = info->tx_get = 0;
1676 del_timer(&info->tx_timer);
1677 spin_unlock_irqrestore(&info->lock, flags);
1678
1679 wake_up_interruptible(&tty->write_wait);
1680 tty_wakeup(tty);
1681 }
1682
1683 /* Send a high-priority XON/XOFF character
1684 */
mgslpc_send_xchar(struct tty_struct * tty,char ch)1685 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1686 {
1687 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1688 unsigned long flags;
1689
1690 if (debug_level >= DEBUG_LEVEL_INFO)
1691 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1692 __FILE__, __LINE__, info->device_name, ch);
1693
1694 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1695 return;
1696
1697 info->x_char = ch;
1698 if (ch) {
1699 spin_lock_irqsave(&info->lock, flags);
1700 if (!info->tx_enabled)
1701 tx_start(info, tty);
1702 spin_unlock_irqrestore(&info->lock, flags);
1703 }
1704 }
1705
1706 /* Signal remote device to throttle send data (our receive data)
1707 */
mgslpc_throttle(struct tty_struct * tty)1708 static void mgslpc_throttle(struct tty_struct * tty)
1709 {
1710 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1711 unsigned long flags;
1712
1713 if (debug_level >= DEBUG_LEVEL_INFO)
1714 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1715 __FILE__, __LINE__, info->device_name);
1716
1717 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1718 return;
1719
1720 if (I_IXOFF(tty))
1721 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1722
1723 if (C_CRTSCTS(tty)) {
1724 spin_lock_irqsave(&info->lock, flags);
1725 info->serial_signals &= ~SerialSignal_RTS;
1726 set_signals(info);
1727 spin_unlock_irqrestore(&info->lock, flags);
1728 }
1729 }
1730
1731 /* Signal remote device to stop throttling send data (our receive data)
1732 */
mgslpc_unthrottle(struct tty_struct * tty)1733 static void mgslpc_unthrottle(struct tty_struct * tty)
1734 {
1735 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1736 unsigned long flags;
1737
1738 if (debug_level >= DEBUG_LEVEL_INFO)
1739 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1740 __FILE__, __LINE__, info->device_name);
1741
1742 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1743 return;
1744
1745 if (I_IXOFF(tty)) {
1746 if (info->x_char)
1747 info->x_char = 0;
1748 else
1749 mgslpc_send_xchar(tty, START_CHAR(tty));
1750 }
1751
1752 if (C_CRTSCTS(tty)) {
1753 spin_lock_irqsave(&info->lock, flags);
1754 info->serial_signals |= SerialSignal_RTS;
1755 set_signals(info);
1756 spin_unlock_irqrestore(&info->lock, flags);
1757 }
1758 }
1759
1760 /* get the current serial statistics
1761 */
get_stats(MGSLPC_INFO * info,struct mgsl_icount __user * user_icount)1762 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1763 {
1764 int err;
1765 if (debug_level >= DEBUG_LEVEL_INFO)
1766 printk("get_params(%s)\n", info->device_name);
1767 if (!user_icount) {
1768 memset(&info->icount, 0, sizeof(info->icount));
1769 } else {
1770 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1771 if (err)
1772 return -EFAULT;
1773 }
1774 return 0;
1775 }
1776
1777 /* get the current serial parameters
1778 */
get_params(MGSLPC_INFO * info,MGSL_PARAMS __user * user_params)1779 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1780 {
1781 int err;
1782 if (debug_level >= DEBUG_LEVEL_INFO)
1783 printk("get_params(%s)\n", info->device_name);
1784 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1785 if (err)
1786 return -EFAULT;
1787 return 0;
1788 }
1789
1790 /* set the serial parameters
1791 *
1792 * Arguments:
1793 *
1794 * info pointer to device instance data
1795 * new_params user buffer containing new serial params
1796 *
1797 * Returns: 0 if success, otherwise error code
1798 */
set_params(MGSLPC_INFO * info,MGSL_PARAMS __user * new_params,struct tty_struct * tty)1799 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1800 {
1801 unsigned long flags;
1802 MGSL_PARAMS tmp_params;
1803 int err;
1804
1805 if (debug_level >= DEBUG_LEVEL_INFO)
1806 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1807 info->device_name);
1808 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1809 if (err) {
1810 if (debug_level >= DEBUG_LEVEL_INFO)
1811 printk("%s(%d):set_params(%s) user buffer copy failed\n",
1812 __FILE__, __LINE__, info->device_name);
1813 return -EFAULT;
1814 }
1815
1816 spin_lock_irqsave(&info->lock, flags);
1817 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1818 spin_unlock_irqrestore(&info->lock, flags);
1819
1820 mgslpc_change_params(info, tty);
1821
1822 return 0;
1823 }
1824
get_txidle(MGSLPC_INFO * info,int __user * idle_mode)1825 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1826 {
1827 int err;
1828 if (debug_level >= DEBUG_LEVEL_INFO)
1829 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1830 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1831 if (err)
1832 return -EFAULT;
1833 return 0;
1834 }
1835
set_txidle(MGSLPC_INFO * info,int idle_mode)1836 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1837 {
1838 unsigned long flags;
1839 if (debug_level >= DEBUG_LEVEL_INFO)
1840 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1841 spin_lock_irqsave(&info->lock, flags);
1842 info->idle_mode = idle_mode;
1843 tx_set_idle(info);
1844 spin_unlock_irqrestore(&info->lock, flags);
1845 return 0;
1846 }
1847
get_interface(MGSLPC_INFO * info,int __user * if_mode)1848 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1849 {
1850 int err;
1851 if (debug_level >= DEBUG_LEVEL_INFO)
1852 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1853 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1854 if (err)
1855 return -EFAULT;
1856 return 0;
1857 }
1858
set_interface(MGSLPC_INFO * info,int if_mode)1859 static int set_interface(MGSLPC_INFO * info, int if_mode)
1860 {
1861 unsigned long flags;
1862 unsigned char val;
1863 if (debug_level >= DEBUG_LEVEL_INFO)
1864 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1865 spin_lock_irqsave(&info->lock, flags);
1866 info->if_mode = if_mode;
1867
1868 val = read_reg(info, PVR) & 0x0f;
1869 switch (info->if_mode)
1870 {
1871 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1872 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1873 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1874 }
1875 write_reg(info, PVR, val);
1876
1877 spin_unlock_irqrestore(&info->lock, flags);
1878 return 0;
1879 }
1880
set_txenable(MGSLPC_INFO * info,int enable,struct tty_struct * tty)1881 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1882 {
1883 unsigned long flags;
1884
1885 if (debug_level >= DEBUG_LEVEL_INFO)
1886 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1887
1888 spin_lock_irqsave(&info->lock, flags);
1889 if (enable) {
1890 if (!info->tx_enabled)
1891 tx_start(info, tty);
1892 } else {
1893 if (info->tx_enabled)
1894 tx_stop(info);
1895 }
1896 spin_unlock_irqrestore(&info->lock, flags);
1897 return 0;
1898 }
1899
tx_abort(MGSLPC_INFO * info)1900 static int tx_abort(MGSLPC_INFO * info)
1901 {
1902 unsigned long flags;
1903
1904 if (debug_level >= DEBUG_LEVEL_INFO)
1905 printk("tx_abort(%s)\n", info->device_name);
1906
1907 spin_lock_irqsave(&info->lock, flags);
1908 if (info->tx_active && info->tx_count &&
1909 info->params.mode == MGSL_MODE_HDLC) {
1910 /* clear data count so FIFO is not filled on next IRQ.
1911 * This results in underrun and abort transmission.
1912 */
1913 info->tx_count = info->tx_put = info->tx_get = 0;
1914 info->tx_aborting = true;
1915 }
1916 spin_unlock_irqrestore(&info->lock, flags);
1917 return 0;
1918 }
1919
set_rxenable(MGSLPC_INFO * info,int enable)1920 static int set_rxenable(MGSLPC_INFO * info, int enable)
1921 {
1922 unsigned long flags;
1923
1924 if (debug_level >= DEBUG_LEVEL_INFO)
1925 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1926
1927 spin_lock_irqsave(&info->lock, flags);
1928 if (enable) {
1929 if (!info->rx_enabled)
1930 rx_start(info);
1931 } else {
1932 if (info->rx_enabled)
1933 rx_stop(info);
1934 }
1935 spin_unlock_irqrestore(&info->lock, flags);
1936 return 0;
1937 }
1938
1939 /* wait for specified event to occur
1940 *
1941 * Arguments: info pointer to device instance data
1942 * mask pointer to bitmask of events to wait for
1943 * Return Value: 0 if successful and bit mask updated with
1944 * of events triggerred,
1945 * otherwise error code
1946 */
wait_events(MGSLPC_INFO * info,int __user * mask_ptr)1947 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1948 {
1949 unsigned long flags;
1950 int s;
1951 int rc=0;
1952 struct mgsl_icount cprev, cnow;
1953 int events;
1954 int mask;
1955 struct _input_signal_events oldsigs, newsigs;
1956 DECLARE_WAITQUEUE(wait, current);
1957
1958 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1959 if (rc)
1960 return -EFAULT;
1961
1962 if (debug_level >= DEBUG_LEVEL_INFO)
1963 printk("wait_events(%s,%d)\n", info->device_name, mask);
1964
1965 spin_lock_irqsave(&info->lock, flags);
1966
1967 /* return immediately if state matches requested events */
1968 get_signals(info);
1969 s = info->serial_signals;
1970 events = mask &
1971 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1972 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1973 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1974 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1975 if (events) {
1976 spin_unlock_irqrestore(&info->lock, flags);
1977 goto exit;
1978 }
1979
1980 /* save current irq counts */
1981 cprev = info->icount;
1982 oldsigs = info->input_signal_events;
1983
1984 if ((info->params.mode == MGSL_MODE_HDLC) &&
1985 (mask & MgslEvent_ExitHuntMode))
1986 irq_enable(info, CHA, IRQ_EXITHUNT);
1987
1988 set_current_state(TASK_INTERRUPTIBLE);
1989 add_wait_queue(&info->event_wait_q, &wait);
1990
1991 spin_unlock_irqrestore(&info->lock, flags);
1992
1993
1994 for(;;) {
1995 schedule();
1996 if (signal_pending(current)) {
1997 rc = -ERESTARTSYS;
1998 break;
1999 }
2000
2001 /* get current irq counts */
2002 spin_lock_irqsave(&info->lock, flags);
2003 cnow = info->icount;
2004 newsigs = info->input_signal_events;
2005 set_current_state(TASK_INTERRUPTIBLE);
2006 spin_unlock_irqrestore(&info->lock, flags);
2007
2008 /* if no change, wait aborted for some reason */
2009 if (newsigs.dsr_up == oldsigs.dsr_up &&
2010 newsigs.dsr_down == oldsigs.dsr_down &&
2011 newsigs.dcd_up == oldsigs.dcd_up &&
2012 newsigs.dcd_down == oldsigs.dcd_down &&
2013 newsigs.cts_up == oldsigs.cts_up &&
2014 newsigs.cts_down == oldsigs.cts_down &&
2015 newsigs.ri_up == oldsigs.ri_up &&
2016 newsigs.ri_down == oldsigs.ri_down &&
2017 cnow.exithunt == cprev.exithunt &&
2018 cnow.rxidle == cprev.rxidle) {
2019 rc = -EIO;
2020 break;
2021 }
2022
2023 events = mask &
2024 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2025 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2026 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2027 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2028 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2029 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2030 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2031 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2032 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2033 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2034 if (events)
2035 break;
2036
2037 cprev = cnow;
2038 oldsigs = newsigs;
2039 }
2040
2041 remove_wait_queue(&info->event_wait_q, &wait);
2042 set_current_state(TASK_RUNNING);
2043
2044 if (mask & MgslEvent_ExitHuntMode) {
2045 spin_lock_irqsave(&info->lock, flags);
2046 if (!waitqueue_active(&info->event_wait_q))
2047 irq_disable(info, CHA, IRQ_EXITHUNT);
2048 spin_unlock_irqrestore(&info->lock, flags);
2049 }
2050 exit:
2051 if (rc == 0)
2052 PUT_USER(rc, events, mask_ptr);
2053 return rc;
2054 }
2055
modem_input_wait(MGSLPC_INFO * info,int arg)2056 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2057 {
2058 unsigned long flags;
2059 int rc;
2060 struct mgsl_icount cprev, cnow;
2061 DECLARE_WAITQUEUE(wait, current);
2062
2063 /* save current irq counts */
2064 spin_lock_irqsave(&info->lock, flags);
2065 cprev = info->icount;
2066 add_wait_queue(&info->status_event_wait_q, &wait);
2067 set_current_state(TASK_INTERRUPTIBLE);
2068 spin_unlock_irqrestore(&info->lock, flags);
2069
2070 for(;;) {
2071 schedule();
2072 if (signal_pending(current)) {
2073 rc = -ERESTARTSYS;
2074 break;
2075 }
2076
2077 /* get new irq counts */
2078 spin_lock_irqsave(&info->lock, flags);
2079 cnow = info->icount;
2080 set_current_state(TASK_INTERRUPTIBLE);
2081 spin_unlock_irqrestore(&info->lock, flags);
2082
2083 /* if no change, wait aborted for some reason */
2084 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2085 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2086 rc = -EIO;
2087 break;
2088 }
2089
2090 /* check for change in caller specified modem input */
2091 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2092 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2093 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2094 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2095 rc = 0;
2096 break;
2097 }
2098
2099 cprev = cnow;
2100 }
2101 remove_wait_queue(&info->status_event_wait_q, &wait);
2102 set_current_state(TASK_RUNNING);
2103 return rc;
2104 }
2105
2106 /* return the state of the serial control and status signals
2107 */
tiocmget(struct tty_struct * tty)2108 static int tiocmget(struct tty_struct *tty)
2109 {
2110 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2111 unsigned int result;
2112 unsigned long flags;
2113
2114 spin_lock_irqsave(&info->lock, flags);
2115 get_signals(info);
2116 spin_unlock_irqrestore(&info->lock, flags);
2117
2118 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2119 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2120 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2121 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2122 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2123 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2124
2125 if (debug_level >= DEBUG_LEVEL_INFO)
2126 printk("%s(%d):%s tiocmget() value=%08X\n",
2127 __FILE__, __LINE__, info->device_name, result);
2128 return result;
2129 }
2130
2131 /* set modem control signals (DTR/RTS)
2132 */
tiocmset(struct tty_struct * tty,unsigned int set,unsigned int clear)2133 static int tiocmset(struct tty_struct *tty,
2134 unsigned int set, unsigned int clear)
2135 {
2136 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2137 unsigned long flags;
2138
2139 if (debug_level >= DEBUG_LEVEL_INFO)
2140 printk("%s(%d):%s tiocmset(%x,%x)\n",
2141 __FILE__, __LINE__, info->device_name, set, clear);
2142
2143 if (set & TIOCM_RTS)
2144 info->serial_signals |= SerialSignal_RTS;
2145 if (set & TIOCM_DTR)
2146 info->serial_signals |= SerialSignal_DTR;
2147 if (clear & TIOCM_RTS)
2148 info->serial_signals &= ~SerialSignal_RTS;
2149 if (clear & TIOCM_DTR)
2150 info->serial_signals &= ~SerialSignal_DTR;
2151
2152 spin_lock_irqsave(&info->lock, flags);
2153 set_signals(info);
2154 spin_unlock_irqrestore(&info->lock, flags);
2155
2156 return 0;
2157 }
2158
2159 /* Set or clear transmit break condition
2160 *
2161 * Arguments: tty pointer to tty instance data
2162 * break_state -1=set break condition, 0=clear
2163 */
mgslpc_break(struct tty_struct * tty,int break_state)2164 static int mgslpc_break(struct tty_struct *tty, int break_state)
2165 {
2166 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2167 unsigned long flags;
2168
2169 if (debug_level >= DEBUG_LEVEL_INFO)
2170 printk("%s(%d):mgslpc_break(%s,%d)\n",
2171 __FILE__, __LINE__, info->device_name, break_state);
2172
2173 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2174 return -EINVAL;
2175
2176 spin_lock_irqsave(&info->lock, flags);
2177 if (break_state == -1)
2178 set_reg_bits(info, CHA+DAFO, BIT6);
2179 else
2180 clear_reg_bits(info, CHA+DAFO, BIT6);
2181 spin_unlock_irqrestore(&info->lock, flags);
2182 return 0;
2183 }
2184
mgslpc_get_icount(struct tty_struct * tty,struct serial_icounter_struct * icount)2185 static int mgslpc_get_icount(struct tty_struct *tty,
2186 struct serial_icounter_struct *icount)
2187 {
2188 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2189 struct mgsl_icount cnow; /* kernel counter temps */
2190 unsigned long flags;
2191
2192 spin_lock_irqsave(&info->lock, flags);
2193 cnow = info->icount;
2194 spin_unlock_irqrestore(&info->lock, flags);
2195
2196 icount->cts = cnow.cts;
2197 icount->dsr = cnow.dsr;
2198 icount->rng = cnow.rng;
2199 icount->dcd = cnow.dcd;
2200 icount->rx = cnow.rx;
2201 icount->tx = cnow.tx;
2202 icount->frame = cnow.frame;
2203 icount->overrun = cnow.overrun;
2204 icount->parity = cnow.parity;
2205 icount->brk = cnow.brk;
2206 icount->buf_overrun = cnow.buf_overrun;
2207
2208 return 0;
2209 }
2210
2211 /* Service an IOCTL request
2212 *
2213 * Arguments:
2214 *
2215 * tty pointer to tty instance data
2216 * cmd IOCTL command code
2217 * arg command argument/context
2218 *
2219 * Return Value: 0 if success, otherwise error code
2220 */
mgslpc_ioctl(struct tty_struct * tty,unsigned int cmd,unsigned long arg)2221 static int mgslpc_ioctl(struct tty_struct *tty,
2222 unsigned int cmd, unsigned long arg)
2223 {
2224 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2225 void __user *argp = (void __user *)arg;
2226
2227 if (debug_level >= DEBUG_LEVEL_INFO)
2228 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__, __LINE__,
2229 info->device_name, cmd);
2230
2231 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2232 return -ENODEV;
2233
2234 if (cmd != TIOCMIWAIT) {
2235 if (tty_io_error(tty))
2236 return -EIO;
2237 }
2238
2239 switch (cmd) {
2240 case MGSL_IOCGPARAMS:
2241 return get_params(info, argp);
2242 case MGSL_IOCSPARAMS:
2243 return set_params(info, argp, tty);
2244 case MGSL_IOCGTXIDLE:
2245 return get_txidle(info, argp);
2246 case MGSL_IOCSTXIDLE:
2247 return set_txidle(info, (int)arg);
2248 case MGSL_IOCGIF:
2249 return get_interface(info, argp);
2250 case MGSL_IOCSIF:
2251 return set_interface(info,(int)arg);
2252 case MGSL_IOCTXENABLE:
2253 return set_txenable(info,(int)arg, tty);
2254 case MGSL_IOCRXENABLE:
2255 return set_rxenable(info,(int)arg);
2256 case MGSL_IOCTXABORT:
2257 return tx_abort(info);
2258 case MGSL_IOCGSTATS:
2259 return get_stats(info, argp);
2260 case MGSL_IOCWAITEVENT:
2261 return wait_events(info, argp);
2262 case TIOCMIWAIT:
2263 return modem_input_wait(info,(int)arg);
2264 default:
2265 return -ENOIOCTLCMD;
2266 }
2267 return 0;
2268 }
2269
2270 /* Set new termios settings
2271 *
2272 * Arguments:
2273 *
2274 * tty pointer to tty structure
2275 * termios pointer to buffer to hold returned old termios
2276 */
mgslpc_set_termios(struct tty_struct * tty,const struct ktermios * old_termios)2277 static void mgslpc_set_termios(struct tty_struct *tty,
2278 const struct ktermios *old_termios)
2279 {
2280 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2281 unsigned long flags;
2282
2283 if (debug_level >= DEBUG_LEVEL_INFO)
2284 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__, __LINE__,
2285 tty->driver->name);
2286
2287 /* just return if nothing has changed */
2288 if ((tty->termios.c_cflag == old_termios->c_cflag)
2289 && (RELEVANT_IFLAG(tty->termios.c_iflag)
2290 == RELEVANT_IFLAG(old_termios->c_iflag)))
2291 return;
2292
2293 mgslpc_change_params(info, tty);
2294
2295 /* Handle transition to B0 status */
2296 if ((old_termios->c_cflag & CBAUD) && !C_BAUD(tty)) {
2297 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2298 spin_lock_irqsave(&info->lock, flags);
2299 set_signals(info);
2300 spin_unlock_irqrestore(&info->lock, flags);
2301 }
2302
2303 /* Handle transition away from B0 status */
2304 if (!(old_termios->c_cflag & CBAUD) && C_BAUD(tty)) {
2305 info->serial_signals |= SerialSignal_DTR;
2306 if (!C_CRTSCTS(tty) || !tty_throttled(tty))
2307 info->serial_signals |= SerialSignal_RTS;
2308 spin_lock_irqsave(&info->lock, flags);
2309 set_signals(info);
2310 spin_unlock_irqrestore(&info->lock, flags);
2311 }
2312
2313 /* Handle turning off CRTSCTS */
2314 if (old_termios->c_cflag & CRTSCTS && !C_CRTSCTS(tty)) {
2315 tty->hw_stopped = 0;
2316 tx_release(tty);
2317 }
2318 }
2319
mgslpc_close(struct tty_struct * tty,struct file * filp)2320 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2321 {
2322 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2323 struct tty_port *port = &info->port;
2324
2325 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2326 return;
2327
2328 if (debug_level >= DEBUG_LEVEL_INFO)
2329 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2330 __FILE__, __LINE__, info->device_name, port->count);
2331
2332 if (tty_port_close_start(port, tty, filp) == 0)
2333 goto cleanup;
2334
2335 if (tty_port_initialized(port))
2336 mgslpc_wait_until_sent(tty, info->timeout);
2337
2338 mgslpc_flush_buffer(tty);
2339
2340 tty_ldisc_flush(tty);
2341 shutdown(info, tty);
2342
2343 tty_port_close_end(port, tty);
2344 tty_port_tty_set(port, NULL);
2345 cleanup:
2346 if (debug_level >= DEBUG_LEVEL_INFO)
2347 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__, __LINE__,
2348 tty->driver->name, port->count);
2349 }
2350
2351 /* Wait until the transmitter is empty.
2352 */
mgslpc_wait_until_sent(struct tty_struct * tty,int timeout)2353 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2354 {
2355 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2356 unsigned long orig_jiffies, char_time;
2357
2358 if (!info)
2359 return;
2360
2361 if (debug_level >= DEBUG_LEVEL_INFO)
2362 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2363 __FILE__, __LINE__, info->device_name);
2364
2365 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2366 return;
2367
2368 if (!tty_port_initialized(&info->port))
2369 goto exit;
2370
2371 orig_jiffies = jiffies;
2372
2373 /* Set check interval to 1/5 of estimated time to
2374 * send a character, and make it at least 1. The check
2375 * interval should also be less than the timeout.
2376 * Note: use tight timings here to satisfy the NIST-PCTS.
2377 */
2378
2379 if (info->params.data_rate) {
2380 char_time = info->timeout/(32 * 5);
2381 if (!char_time)
2382 char_time++;
2383 } else
2384 char_time = 1;
2385
2386 if (timeout)
2387 char_time = min_t(unsigned long, char_time, timeout);
2388
2389 if (info->params.mode == MGSL_MODE_HDLC) {
2390 while (info->tx_active) {
2391 msleep_interruptible(jiffies_to_msecs(char_time));
2392 if (signal_pending(current))
2393 break;
2394 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2395 break;
2396 }
2397 } else {
2398 while ((info->tx_count || info->tx_active) &&
2399 info->tx_enabled) {
2400 msleep_interruptible(jiffies_to_msecs(char_time));
2401 if (signal_pending(current))
2402 break;
2403 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2404 break;
2405 }
2406 }
2407
2408 exit:
2409 if (debug_level >= DEBUG_LEVEL_INFO)
2410 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2411 __FILE__, __LINE__, info->device_name);
2412 }
2413
2414 /* Called by tty_hangup() when a hangup is signaled.
2415 * This is the same as closing all open files for the port.
2416 */
mgslpc_hangup(struct tty_struct * tty)2417 static void mgslpc_hangup(struct tty_struct *tty)
2418 {
2419 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2420
2421 if (debug_level >= DEBUG_LEVEL_INFO)
2422 printk("%s(%d):mgslpc_hangup(%s)\n",
2423 __FILE__, __LINE__, info->device_name);
2424
2425 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2426 return;
2427
2428 mgslpc_flush_buffer(tty);
2429 shutdown(info, tty);
2430 tty_port_hangup(&info->port);
2431 }
2432
carrier_raised(struct tty_port * port)2433 static int carrier_raised(struct tty_port *port)
2434 {
2435 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2436 unsigned long flags;
2437
2438 spin_lock_irqsave(&info->lock, flags);
2439 get_signals(info);
2440 spin_unlock_irqrestore(&info->lock, flags);
2441
2442 if (info->serial_signals & SerialSignal_DCD)
2443 return 1;
2444 return 0;
2445 }
2446
dtr_rts(struct tty_port * port,int onoff)2447 static void dtr_rts(struct tty_port *port, int onoff)
2448 {
2449 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2450 unsigned long flags;
2451
2452 spin_lock_irqsave(&info->lock, flags);
2453 if (onoff)
2454 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
2455 else
2456 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2457 set_signals(info);
2458 spin_unlock_irqrestore(&info->lock, flags);
2459 }
2460
2461
mgslpc_open(struct tty_struct * tty,struct file * filp)2462 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2463 {
2464 MGSLPC_INFO *info;
2465 struct tty_port *port;
2466 int retval, line;
2467 unsigned long flags;
2468
2469 /* verify range of specified line number */
2470 line = tty->index;
2471 if (line >= mgslpc_device_count) {
2472 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2473 __FILE__, __LINE__, line);
2474 return -ENODEV;
2475 }
2476
2477 /* find the info structure for the specified line */
2478 info = mgslpc_device_list;
2479 while(info && info->line != line)
2480 info = info->next_device;
2481 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2482 return -ENODEV;
2483
2484 port = &info->port;
2485 tty->driver_data = info;
2486 tty_port_tty_set(port, tty);
2487
2488 if (debug_level >= DEBUG_LEVEL_INFO)
2489 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2490 __FILE__, __LINE__, tty->driver->name, port->count);
2491
2492 spin_lock_irqsave(&info->netlock, flags);
2493 if (info->netcount) {
2494 retval = -EBUSY;
2495 spin_unlock_irqrestore(&info->netlock, flags);
2496 goto cleanup;
2497 }
2498 spin_lock(&port->lock);
2499 port->count++;
2500 spin_unlock(&port->lock);
2501 spin_unlock_irqrestore(&info->netlock, flags);
2502
2503 if (port->count == 1) {
2504 /* 1st open on this device, init hardware */
2505 retval = startup(info, tty);
2506 if (retval < 0)
2507 goto cleanup;
2508 }
2509
2510 retval = tty_port_block_til_ready(&info->port, tty, filp);
2511 if (retval) {
2512 if (debug_level >= DEBUG_LEVEL_INFO)
2513 printk("%s(%d):block_til_ready(%s) returned %d\n",
2514 __FILE__, __LINE__, info->device_name, retval);
2515 goto cleanup;
2516 }
2517
2518 if (debug_level >= DEBUG_LEVEL_INFO)
2519 printk("%s(%d):mgslpc_open(%s) success\n",
2520 __FILE__, __LINE__, info->device_name);
2521 retval = 0;
2522
2523 cleanup:
2524 return retval;
2525 }
2526
2527 /*
2528 * /proc fs routines....
2529 */
2530
line_info(struct seq_file * m,MGSLPC_INFO * info)2531 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2532 {
2533 char stat_buf[30];
2534 unsigned long flags;
2535
2536 seq_printf(m, "%s:io:%04X irq:%d",
2537 info->device_name, info->io_base, info->irq_level);
2538
2539 /* output current serial signal states */
2540 spin_lock_irqsave(&info->lock, flags);
2541 get_signals(info);
2542 spin_unlock_irqrestore(&info->lock, flags);
2543
2544 stat_buf[0] = 0;
2545 stat_buf[1] = 0;
2546 if (info->serial_signals & SerialSignal_RTS)
2547 strcat(stat_buf, "|RTS");
2548 if (info->serial_signals & SerialSignal_CTS)
2549 strcat(stat_buf, "|CTS");
2550 if (info->serial_signals & SerialSignal_DTR)
2551 strcat(stat_buf, "|DTR");
2552 if (info->serial_signals & SerialSignal_DSR)
2553 strcat(stat_buf, "|DSR");
2554 if (info->serial_signals & SerialSignal_DCD)
2555 strcat(stat_buf, "|CD");
2556 if (info->serial_signals & SerialSignal_RI)
2557 strcat(stat_buf, "|RI");
2558
2559 if (info->params.mode == MGSL_MODE_HDLC) {
2560 seq_printf(m, " HDLC txok:%d rxok:%d",
2561 info->icount.txok, info->icount.rxok);
2562 if (info->icount.txunder)
2563 seq_printf(m, " txunder:%d", info->icount.txunder);
2564 if (info->icount.txabort)
2565 seq_printf(m, " txabort:%d", info->icount.txabort);
2566 if (info->icount.rxshort)
2567 seq_printf(m, " rxshort:%d", info->icount.rxshort);
2568 if (info->icount.rxlong)
2569 seq_printf(m, " rxlong:%d", info->icount.rxlong);
2570 if (info->icount.rxover)
2571 seq_printf(m, " rxover:%d", info->icount.rxover);
2572 if (info->icount.rxcrc)
2573 seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2574 } else {
2575 seq_printf(m, " ASYNC tx:%d rx:%d",
2576 info->icount.tx, info->icount.rx);
2577 if (info->icount.frame)
2578 seq_printf(m, " fe:%d", info->icount.frame);
2579 if (info->icount.parity)
2580 seq_printf(m, " pe:%d", info->icount.parity);
2581 if (info->icount.brk)
2582 seq_printf(m, " brk:%d", info->icount.brk);
2583 if (info->icount.overrun)
2584 seq_printf(m, " oe:%d", info->icount.overrun);
2585 }
2586
2587 /* Append serial signal status to end */
2588 seq_printf(m, " %s\n", stat_buf+1);
2589
2590 seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2591 info->tx_active,info->bh_requested,info->bh_running,
2592 info->pending_bh);
2593 }
2594
2595 /* Called to print information about devices
2596 */
mgslpc_proc_show(struct seq_file * m,void * v)2597 static int mgslpc_proc_show(struct seq_file *m, void *v)
2598 {
2599 MGSLPC_INFO *info;
2600
2601 seq_printf(m, "synclink driver:%s\n", driver_version);
2602
2603 info = mgslpc_device_list;
2604 while (info) {
2605 line_info(m, info);
2606 info = info->next_device;
2607 }
2608 return 0;
2609 }
2610
rx_alloc_buffers(MGSLPC_INFO * info)2611 static int rx_alloc_buffers(MGSLPC_INFO *info)
2612 {
2613 /* each buffer has header and data */
2614 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2615
2616 /* calculate total allocation size for 8 buffers */
2617 info->rx_buf_total_size = info->rx_buf_size * 8;
2618
2619 /* limit total allocated memory */
2620 if (info->rx_buf_total_size > 0x10000)
2621 info->rx_buf_total_size = 0x10000;
2622
2623 /* calculate number of buffers */
2624 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2625
2626 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2627 if (info->rx_buf == NULL)
2628 return -ENOMEM;
2629
2630 /* unused flag buffer to satisfy receive_buf calling interface */
2631 info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL);
2632 if (!info->flag_buf) {
2633 kfree(info->rx_buf);
2634 info->rx_buf = NULL;
2635 return -ENOMEM;
2636 }
2637
2638 rx_reset_buffers(info);
2639 return 0;
2640 }
2641
rx_free_buffers(MGSLPC_INFO * info)2642 static void rx_free_buffers(MGSLPC_INFO *info)
2643 {
2644 kfree(info->rx_buf);
2645 info->rx_buf = NULL;
2646 kfree(info->flag_buf);
2647 info->flag_buf = NULL;
2648 }
2649
claim_resources(MGSLPC_INFO * info)2650 static int claim_resources(MGSLPC_INFO *info)
2651 {
2652 if (rx_alloc_buffers(info) < 0) {
2653 printk("Can't allocate rx buffer %s\n", info->device_name);
2654 release_resources(info);
2655 return -ENODEV;
2656 }
2657 return 0;
2658 }
2659
release_resources(MGSLPC_INFO * info)2660 static void release_resources(MGSLPC_INFO *info)
2661 {
2662 if (debug_level >= DEBUG_LEVEL_INFO)
2663 printk("release_resources(%s)\n", info->device_name);
2664 rx_free_buffers(info);
2665 }
2666
2667 /* Add the specified device instance data structure to the
2668 * global linked list of devices and increment the device count.
2669 *
2670 * Arguments: info pointer to device instance data
2671 */
mgslpc_add_device(MGSLPC_INFO * info)2672 static int mgslpc_add_device(MGSLPC_INFO *info)
2673 {
2674 MGSLPC_INFO *current_dev = NULL;
2675 struct device *tty_dev;
2676 int ret;
2677
2678 info->next_device = NULL;
2679 info->line = mgslpc_device_count;
2680 sprintf(info->device_name,"ttySLP%d",info->line);
2681
2682 if (info->line < MAX_DEVICE_COUNT) {
2683 if (maxframe[info->line])
2684 info->max_frame_size = maxframe[info->line];
2685 }
2686
2687 mgslpc_device_count++;
2688
2689 if (!mgslpc_device_list)
2690 mgslpc_device_list = info;
2691 else {
2692 current_dev = mgslpc_device_list;
2693 while (current_dev->next_device)
2694 current_dev = current_dev->next_device;
2695 current_dev->next_device = info;
2696 }
2697
2698 if (info->max_frame_size < 4096)
2699 info->max_frame_size = 4096;
2700 else if (info->max_frame_size > 65535)
2701 info->max_frame_size = 65535;
2702
2703 printk("SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2704 info->device_name, info->io_base, info->irq_level);
2705
2706 #if SYNCLINK_GENERIC_HDLC
2707 ret = hdlcdev_init(info);
2708 if (ret != 0)
2709 goto failed;
2710 #endif
2711
2712 tty_dev = tty_port_register_device(&info->port, serial_driver, info->line,
2713 &info->p_dev->dev);
2714 if (IS_ERR(tty_dev)) {
2715 ret = PTR_ERR(tty_dev);
2716 #if SYNCLINK_GENERIC_HDLC
2717 hdlcdev_exit(info);
2718 #endif
2719 goto failed;
2720 }
2721
2722 return 0;
2723
2724 failed:
2725 if (current_dev)
2726 current_dev->next_device = NULL;
2727 else
2728 mgslpc_device_list = NULL;
2729 mgslpc_device_count--;
2730 return ret;
2731 }
2732
mgslpc_remove_device(MGSLPC_INFO * remove_info)2733 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2734 {
2735 MGSLPC_INFO *info = mgslpc_device_list;
2736 MGSLPC_INFO *last = NULL;
2737
2738 while(info) {
2739 if (info == remove_info) {
2740 if (last)
2741 last->next_device = info->next_device;
2742 else
2743 mgslpc_device_list = info->next_device;
2744 tty_unregister_device(serial_driver, info->line);
2745 #if SYNCLINK_GENERIC_HDLC
2746 hdlcdev_exit(info);
2747 #endif
2748 release_resources(info);
2749 tty_port_destroy(&info->port);
2750 kfree(info);
2751 mgslpc_device_count--;
2752 return;
2753 }
2754 last = info;
2755 info = info->next_device;
2756 }
2757 }
2758
2759 static const struct pcmcia_device_id mgslpc_ids[] = {
2760 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2761 PCMCIA_DEVICE_NULL
2762 };
2763 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2764
2765 static struct pcmcia_driver mgslpc_driver = {
2766 .owner = THIS_MODULE,
2767 .name = "synclink_cs",
2768 .probe = mgslpc_probe,
2769 .remove = mgslpc_detach,
2770 .id_table = mgslpc_ids,
2771 .suspend = mgslpc_suspend,
2772 .resume = mgslpc_resume,
2773 };
2774
2775 static const struct tty_operations mgslpc_ops = {
2776 .open = mgslpc_open,
2777 .close = mgslpc_close,
2778 .write = mgslpc_write,
2779 .put_char = mgslpc_put_char,
2780 .flush_chars = mgslpc_flush_chars,
2781 .write_room = mgslpc_write_room,
2782 .chars_in_buffer = mgslpc_chars_in_buffer,
2783 .flush_buffer = mgslpc_flush_buffer,
2784 .ioctl = mgslpc_ioctl,
2785 .throttle = mgslpc_throttle,
2786 .unthrottle = mgslpc_unthrottle,
2787 .send_xchar = mgslpc_send_xchar,
2788 .break_ctl = mgslpc_break,
2789 .wait_until_sent = mgslpc_wait_until_sent,
2790 .set_termios = mgslpc_set_termios,
2791 .stop = tx_pause,
2792 .start = tx_release,
2793 .hangup = mgslpc_hangup,
2794 .tiocmget = tiocmget,
2795 .tiocmset = tiocmset,
2796 .get_icount = mgslpc_get_icount,
2797 .proc_show = mgslpc_proc_show,
2798 };
2799
synclink_cs_init(void)2800 static int __init synclink_cs_init(void)
2801 {
2802 int rc;
2803
2804 if (break_on_load) {
2805 mgslpc_get_text_ptr();
2806 BREAKPOINT();
2807 }
2808
2809 serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT,
2810 TTY_DRIVER_REAL_RAW |
2811 TTY_DRIVER_DYNAMIC_DEV);
2812 if (IS_ERR(serial_driver)) {
2813 rc = PTR_ERR(serial_driver);
2814 goto err;
2815 }
2816
2817 /* Initialize the tty_driver structure */
2818 serial_driver->driver_name = "synclink_cs";
2819 serial_driver->name = "ttySLP";
2820 serial_driver->major = ttymajor;
2821 serial_driver->minor_start = 64;
2822 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2823 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2824 serial_driver->init_termios = tty_std_termios;
2825 serial_driver->init_termios.c_cflag =
2826 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2827 tty_set_operations(serial_driver, &mgslpc_ops);
2828
2829 rc = tty_register_driver(serial_driver);
2830 if (rc < 0) {
2831 printk(KERN_ERR "%s(%d):Couldn't register serial driver\n",
2832 __FILE__, __LINE__);
2833 goto err_put_tty;
2834 }
2835
2836 rc = pcmcia_register_driver(&mgslpc_driver);
2837 if (rc < 0)
2838 goto err_unreg_tty;
2839
2840 printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version,
2841 serial_driver->major);
2842
2843 return 0;
2844 err_unreg_tty:
2845 tty_unregister_driver(serial_driver);
2846 err_put_tty:
2847 tty_driver_kref_put(serial_driver);
2848 err:
2849 return rc;
2850 }
2851
synclink_cs_exit(void)2852 static void __exit synclink_cs_exit(void)
2853 {
2854 pcmcia_unregister_driver(&mgslpc_driver);
2855 tty_unregister_driver(serial_driver);
2856 tty_driver_kref_put(serial_driver);
2857 }
2858
2859 module_init(synclink_cs_init);
2860 module_exit(synclink_cs_exit);
2861
mgslpc_set_rate(MGSLPC_INFO * info,unsigned char channel,unsigned int rate)2862 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2863 {
2864 unsigned int M, N;
2865 unsigned char val;
2866
2867 /* note:standard BRG mode is broken in V3.2 chip
2868 * so enhanced mode is always used
2869 */
2870
2871 if (rate) {
2872 N = 3686400 / rate;
2873 if (!N)
2874 N = 1;
2875 N >>= 1;
2876 for (M = 1; N > 64 && M < 16; M++)
2877 N >>= 1;
2878 N--;
2879
2880 /* BGR[5..0] = N
2881 * BGR[9..6] = M
2882 * BGR[7..0] contained in BGR register
2883 * BGR[9..8] contained in CCR2[7..6]
2884 * divisor = (N+1)*2^M
2885 *
2886 * Note: M *must* not be zero (causes asymetric duty cycle)
2887 */
2888 write_reg(info, (unsigned char) (channel + BGR),
2889 (unsigned char) ((M << 6) + N));
2890 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2891 val |= ((M << 4) & 0xc0);
2892 write_reg(info, (unsigned char) (channel + CCR2), val);
2893 }
2894 }
2895
2896 /* Enabled the AUX clock output at the specified frequency.
2897 */
enable_auxclk(MGSLPC_INFO * info)2898 static void enable_auxclk(MGSLPC_INFO *info)
2899 {
2900 unsigned char val;
2901
2902 /* MODE
2903 *
2904 * 07..06 MDS[1..0] 10 = transparent HDLC mode
2905 * 05 ADM Address Mode, 0 = no addr recognition
2906 * 04 TMD Timer Mode, 0 = external
2907 * 03 RAC Receiver Active, 0 = inactive
2908 * 02 RTS 0=RTS active during xmit, 1=RTS always active
2909 * 01 TRS Timer Resolution, 1=512
2910 * 00 TLP Test Loop, 0 = no loop
2911 *
2912 * 1000 0010
2913 */
2914 val = 0x82;
2915
2916 /* channel B RTS is used to enable AUXCLK driver on SP505 */
2917 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2918 val |= BIT2;
2919 write_reg(info, CHB + MODE, val);
2920
2921 /* CCR0
2922 *
2923 * 07 PU Power Up, 1=active, 0=power down
2924 * 06 MCE Master Clock Enable, 1=enabled
2925 * 05 Reserved, 0
2926 * 04..02 SC[2..0] Encoding
2927 * 01..00 SM[1..0] Serial Mode, 00=HDLC
2928 *
2929 * 11000000
2930 */
2931 write_reg(info, CHB + CCR0, 0xc0);
2932
2933 /* CCR1
2934 *
2935 * 07 SFLG Shared Flag, 0 = disable shared flags
2936 * 06 GALP Go Active On Loop, 0 = not used
2937 * 05 GLP Go On Loop, 0 = not used
2938 * 04 ODS Output Driver Select, 1=TxD is push-pull output
2939 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
2940 * 02..00 CM[2..0] Clock Mode
2941 *
2942 * 0001 0111
2943 */
2944 write_reg(info, CHB + CCR1, 0x17);
2945
2946 /* CCR2 (Channel B)
2947 *
2948 * 07..06 BGR[9..8] Baud rate bits 9..8
2949 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
2950 * 04 SSEL Clock source select, 1=submode b
2951 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
2952 * 02 RWX Read/Write Exchange 0=disabled
2953 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
2954 * 00 DIV, data inversion 0=disabled, 1=enabled
2955 *
2956 * 0011 1000
2957 */
2958 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2959 write_reg(info, CHB + CCR2, 0x38);
2960 else
2961 write_reg(info, CHB + CCR2, 0x30);
2962
2963 /* CCR4
2964 *
2965 * 07 MCK4 Master Clock Divide by 4, 1=enabled
2966 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
2967 * 05 TST1 Test Pin, 0=normal operation
2968 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
2969 * 03..02 Reserved, must be 0
2970 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
2971 *
2972 * 0101 0000
2973 */
2974 write_reg(info, CHB + CCR4, 0x50);
2975
2976 /* if auxclk not enabled, set internal BRG so
2977 * CTS transitions can be detected (requires TxC)
2978 */
2979 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2980 mgslpc_set_rate(info, CHB, info->params.clock_speed);
2981 else
2982 mgslpc_set_rate(info, CHB, 921600);
2983 }
2984
loopback_enable(MGSLPC_INFO * info)2985 static void loopback_enable(MGSLPC_INFO *info)
2986 {
2987 unsigned char val;
2988
2989 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
2990 val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0);
2991 write_reg(info, CHA + CCR1, val);
2992
2993 /* CCR2:04 SSEL Clock source select, 1=submode b */
2994 val = read_reg(info, CHA + CCR2) | (BIT4 | BIT5);
2995 write_reg(info, CHA + CCR2, val);
2996
2997 /* set LinkSpeed if available, otherwise default to 2Mbps */
2998 if (info->params.clock_speed)
2999 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3000 else
3001 mgslpc_set_rate(info, CHA, 1843200);
3002
3003 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3004 val = read_reg(info, CHA + MODE) | BIT0;
3005 write_reg(info, CHA + MODE, val);
3006 }
3007
hdlc_mode(MGSLPC_INFO * info)3008 static void hdlc_mode(MGSLPC_INFO *info)
3009 {
3010 unsigned char val;
3011 unsigned char clkmode, clksubmode;
3012
3013 /* disable all interrupts */
3014 irq_disable(info, CHA, 0xffff);
3015 irq_disable(info, CHB, 0xffff);
3016 port_irq_disable(info, 0xff);
3017
3018 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3019 clkmode = clksubmode = 0;
3020 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3021 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3022 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3023 clkmode = 7;
3024 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3025 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3026 /* clock mode 7b, rcv = BRG, xmt = BRG */
3027 clkmode = 7;
3028 clksubmode = 1;
3029 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3030 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3031 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3032 clkmode = 6;
3033 clksubmode = 1;
3034 } else {
3035 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3036 clkmode = 6;
3037 }
3038 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3039 /* clock mode 0b, rcv = RxC, xmt = BRG */
3040 clksubmode = 1;
3041 }
3042
3043 /* MODE
3044 *
3045 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3046 * 05 ADM Address Mode, 0 = no addr recognition
3047 * 04 TMD Timer Mode, 0 = external
3048 * 03 RAC Receiver Active, 0 = inactive
3049 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3050 * 01 TRS Timer Resolution, 1=512
3051 * 00 TLP Test Loop, 0 = no loop
3052 *
3053 * 1000 0010
3054 */
3055 val = 0x82;
3056 if (info->params.loopback)
3057 val |= BIT0;
3058
3059 /* preserve RTS state */
3060 if (info->serial_signals & SerialSignal_RTS)
3061 val |= BIT2;
3062 write_reg(info, CHA + MODE, val);
3063
3064 /* CCR0
3065 *
3066 * 07 PU Power Up, 1=active, 0=power down
3067 * 06 MCE Master Clock Enable, 1=enabled
3068 * 05 Reserved, 0
3069 * 04..02 SC[2..0] Encoding
3070 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3071 *
3072 * 11000000
3073 */
3074 val = 0xc0;
3075 switch (info->params.encoding)
3076 {
3077 case HDLC_ENCODING_NRZI:
3078 val |= BIT3;
3079 break;
3080 case HDLC_ENCODING_BIPHASE_SPACE:
3081 val |= BIT4;
3082 break; // FM0
3083 case HDLC_ENCODING_BIPHASE_MARK:
3084 val |= BIT4 | BIT2;
3085 break; // FM1
3086 case HDLC_ENCODING_BIPHASE_LEVEL:
3087 val |= BIT4 | BIT3;
3088 break; // Manchester
3089 }
3090 write_reg(info, CHA + CCR0, val);
3091
3092 /* CCR1
3093 *
3094 * 07 SFLG Shared Flag, 0 = disable shared flags
3095 * 06 GALP Go Active On Loop, 0 = not used
3096 * 05 GLP Go On Loop, 0 = not used
3097 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3098 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3099 * 02..00 CM[2..0] Clock Mode
3100 *
3101 * 0001 0000
3102 */
3103 val = 0x10 + clkmode;
3104 write_reg(info, CHA + CCR1, val);
3105
3106 /* CCR2
3107 *
3108 * 07..06 BGR[9..8] Baud rate bits 9..8
3109 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3110 * 04 SSEL Clock source select, 1=submode b
3111 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3112 * 02 RWX Read/Write Exchange 0=disabled
3113 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3114 * 00 DIV, data inversion 0=disabled, 1=enabled
3115 *
3116 * 0000 0000
3117 */
3118 val = 0x00;
3119 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3120 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3121 val |= BIT5;
3122 if (clksubmode)
3123 val |= BIT4;
3124 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3125 val |= BIT1;
3126 if (info->params.encoding == HDLC_ENCODING_NRZB)
3127 val |= BIT0;
3128 write_reg(info, CHA + CCR2, val);
3129
3130 /* CCR3
3131 *
3132 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3133 * 05 EPT Enable preamble transmission, 1=enabled
3134 * 04 RADD Receive address pushed to FIFO, 0=disabled
3135 * 03 CRL CRC Reset Level, 0=FFFF
3136 * 02 RCRC Rx CRC 0=On 1=Off
3137 * 01 TCRC Tx CRC 0=On 1=Off
3138 * 00 PSD DPLL Phase Shift Disable
3139 *
3140 * 0000 0000
3141 */
3142 val = 0x00;
3143 if (info->params.crc_type == HDLC_CRC_NONE)
3144 val |= BIT2 | BIT1;
3145 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3146 val |= BIT5;
3147 switch (info->params.preamble_length)
3148 {
3149 case HDLC_PREAMBLE_LENGTH_16BITS:
3150 val |= BIT6;
3151 break;
3152 case HDLC_PREAMBLE_LENGTH_32BITS:
3153 val |= BIT6;
3154 break;
3155 case HDLC_PREAMBLE_LENGTH_64BITS:
3156 val |= BIT7 | BIT6;
3157 break;
3158 }
3159 write_reg(info, CHA + CCR3, val);
3160
3161 /* PRE - Preamble pattern */
3162 val = 0;
3163 switch (info->params.preamble)
3164 {
3165 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3166 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3167 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3168 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3169 }
3170 write_reg(info, CHA + PRE, val);
3171
3172 /* CCR4
3173 *
3174 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3175 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3176 * 05 TST1 Test Pin, 0=normal operation
3177 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3178 * 03..02 Reserved, must be 0
3179 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3180 *
3181 * 0101 0000
3182 */
3183 val = 0x50;
3184 write_reg(info, CHA + CCR4, val);
3185 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3186 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3187 else
3188 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3189
3190 /* RLCR Receive length check register
3191 *
3192 * 7 1=enable receive length check
3193 * 6..0 Max frame length = (RL + 1) * 32
3194 */
3195 write_reg(info, CHA + RLCR, 0);
3196
3197 /* XBCH Transmit Byte Count High
3198 *
3199 * 07 DMA mode, 0 = interrupt driven
3200 * 06 NRM, 0=ABM (ignored)
3201 * 05 CAS Carrier Auto Start
3202 * 04 XC Transmit Continuously (ignored)
3203 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3204 *
3205 * 0000 0000
3206 */
3207 val = 0x00;
3208 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3209 val |= BIT5;
3210 write_reg(info, CHA + XBCH, val);
3211 enable_auxclk(info);
3212 if (info->params.loopback || info->testing_irq)
3213 loopback_enable(info);
3214 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3215 {
3216 irq_enable(info, CHB, IRQ_CTS);
3217 /* PVR[3] 1=AUTO CTS active */
3218 set_reg_bits(info, CHA + PVR, BIT3);
3219 } else
3220 clear_reg_bits(info, CHA + PVR, BIT3);
3221
3222 irq_enable(info, CHA,
3223 IRQ_RXEOM | IRQ_RXFIFO | IRQ_ALLSENT |
3224 IRQ_UNDERRUN | IRQ_TXFIFO);
3225 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3226 wait_command_complete(info, CHA);
3227 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3228
3229 /* Master clock mode enabled above to allow reset commands
3230 * to complete even if no data clocks are present.
3231 *
3232 * Disable master clock mode for normal communications because
3233 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3234 * IRQ when in master clock mode.
3235 *
3236 * Leave master clock mode enabled for IRQ test because the
3237 * timer IRQ used by the test can only happen in master clock mode.
3238 */
3239 if (!info->testing_irq)
3240 clear_reg_bits(info, CHA + CCR0, BIT6);
3241
3242 tx_set_idle(info);
3243
3244 tx_stop(info);
3245 rx_stop(info);
3246 }
3247
rx_stop(MGSLPC_INFO * info)3248 static void rx_stop(MGSLPC_INFO *info)
3249 {
3250 if (debug_level >= DEBUG_LEVEL_ISR)
3251 printk("%s(%d):rx_stop(%s)\n",
3252 __FILE__, __LINE__, info->device_name);
3253
3254 /* MODE:03 RAC Receiver Active, 0=inactive */
3255 clear_reg_bits(info, CHA + MODE, BIT3);
3256
3257 info->rx_enabled = false;
3258 info->rx_overflow = false;
3259 }
3260
rx_start(MGSLPC_INFO * info)3261 static void rx_start(MGSLPC_INFO *info)
3262 {
3263 if (debug_level >= DEBUG_LEVEL_ISR)
3264 printk("%s(%d):rx_start(%s)\n",
3265 __FILE__, __LINE__, info->device_name);
3266
3267 rx_reset_buffers(info);
3268 info->rx_enabled = false;
3269 info->rx_overflow = false;
3270
3271 /* MODE:03 RAC Receiver Active, 1=active */
3272 set_reg_bits(info, CHA + MODE, BIT3);
3273
3274 info->rx_enabled = true;
3275 }
3276
tx_start(MGSLPC_INFO * info,struct tty_struct * tty)3277 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3278 {
3279 if (debug_level >= DEBUG_LEVEL_ISR)
3280 printk("%s(%d):tx_start(%s)\n",
3281 __FILE__, __LINE__, info->device_name);
3282
3283 if (info->tx_count) {
3284 /* If auto RTS enabled and RTS is inactive, then assert */
3285 /* RTS and set a flag indicating that the driver should */
3286 /* negate RTS when the transmission completes. */
3287 info->drop_rts_on_tx_done = false;
3288
3289 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3290 get_signals(info);
3291 if (!(info->serial_signals & SerialSignal_RTS)) {
3292 info->serial_signals |= SerialSignal_RTS;
3293 set_signals(info);
3294 info->drop_rts_on_tx_done = true;
3295 }
3296 }
3297
3298 if (info->params.mode == MGSL_MODE_ASYNC) {
3299 if (!info->tx_active) {
3300 info->tx_active = true;
3301 tx_ready(info, tty);
3302 }
3303 } else {
3304 info->tx_active = true;
3305 tx_ready(info, tty);
3306 mod_timer(&info->tx_timer, jiffies +
3307 msecs_to_jiffies(5000));
3308 }
3309 }
3310
3311 if (!info->tx_enabled)
3312 info->tx_enabled = true;
3313 }
3314
tx_stop(MGSLPC_INFO * info)3315 static void tx_stop(MGSLPC_INFO *info)
3316 {
3317 if (debug_level >= DEBUG_LEVEL_ISR)
3318 printk("%s(%d):tx_stop(%s)\n",
3319 __FILE__, __LINE__, info->device_name);
3320
3321 del_timer(&info->tx_timer);
3322
3323 info->tx_enabled = false;
3324 info->tx_active = false;
3325 }
3326
3327 /* Reset the adapter to a known state and prepare it for further use.
3328 */
reset_device(MGSLPC_INFO * info)3329 static void reset_device(MGSLPC_INFO *info)
3330 {
3331 /* power up both channels (set BIT7) */
3332 write_reg(info, CHA + CCR0, 0x80);
3333 write_reg(info, CHB + CCR0, 0x80);
3334 write_reg(info, CHA + MODE, 0);
3335 write_reg(info, CHB + MODE, 0);
3336
3337 /* disable all interrupts */
3338 irq_disable(info, CHA, 0xffff);
3339 irq_disable(info, CHB, 0xffff);
3340 port_irq_disable(info, 0xff);
3341
3342 /* PCR Port Configuration Register
3343 *
3344 * 07..04 DEC[3..0] Serial I/F select outputs
3345 * 03 output, 1=AUTO CTS control enabled
3346 * 02 RI Ring Indicator input 0=active
3347 * 01 DSR input 0=active
3348 * 00 DTR output 0=active
3349 *
3350 * 0000 0110
3351 */
3352 write_reg(info, PCR, 0x06);
3353
3354 /* PVR Port Value Register
3355 *
3356 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3357 * 03 AUTO CTS output 1=enabled
3358 * 02 RI Ring Indicator input
3359 * 01 DSR input
3360 * 00 DTR output (1=inactive)
3361 *
3362 * 0000 0001
3363 */
3364 // write_reg(info, PVR, PVR_DTR);
3365
3366 /* IPC Interrupt Port Configuration
3367 *
3368 * 07 VIS 1=Masked interrupts visible
3369 * 06..05 Reserved, 0
3370 * 04..03 SLA Slave address, 00 ignored
3371 * 02 CASM Cascading Mode, 1=daisy chain
3372 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3373 *
3374 * 0000 0101
3375 */
3376 write_reg(info, IPC, 0x05);
3377 }
3378
async_mode(MGSLPC_INFO * info)3379 static void async_mode(MGSLPC_INFO *info)
3380 {
3381 unsigned char val;
3382
3383 /* disable all interrupts */
3384 irq_disable(info, CHA, 0xffff);
3385 irq_disable(info, CHB, 0xffff);
3386 port_irq_disable(info, 0xff);
3387
3388 /* MODE
3389 *
3390 * 07 Reserved, 0
3391 * 06 FRTS RTS State, 0=active
3392 * 05 FCTS Flow Control on CTS
3393 * 04 FLON Flow Control Enable
3394 * 03 RAC Receiver Active, 0 = inactive
3395 * 02 RTS 0=Auto RTS, 1=manual RTS
3396 * 01 TRS Timer Resolution, 1=512
3397 * 00 TLP Test Loop, 0 = no loop
3398 *
3399 * 0000 0110
3400 */
3401 val = 0x06;
3402 if (info->params.loopback)
3403 val |= BIT0;
3404
3405 /* preserve RTS state */
3406 if (!(info->serial_signals & SerialSignal_RTS))
3407 val |= BIT6;
3408 write_reg(info, CHA + MODE, val);
3409
3410 /* CCR0
3411 *
3412 * 07 PU Power Up, 1=active, 0=power down
3413 * 06 MCE Master Clock Enable, 1=enabled
3414 * 05 Reserved, 0
3415 * 04..02 SC[2..0] Encoding, 000=NRZ
3416 * 01..00 SM[1..0] Serial Mode, 11=Async
3417 *
3418 * 1000 0011
3419 */
3420 write_reg(info, CHA + CCR0, 0x83);
3421
3422 /* CCR1
3423 *
3424 * 07..05 Reserved, 0
3425 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3426 * 03 BCR Bit Clock Rate, 1=16x
3427 * 02..00 CM[2..0] Clock Mode, 111=BRG
3428 *
3429 * 0001 1111
3430 */
3431 write_reg(info, CHA + CCR1, 0x1f);
3432
3433 /* CCR2 (channel A)
3434 *
3435 * 07..06 BGR[9..8] Baud rate bits 9..8
3436 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3437 * 04 SSEL Clock source select, 1=submode b
3438 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3439 * 02 RWX Read/Write Exchange 0=disabled
3440 * 01 Reserved, 0
3441 * 00 DIV, data inversion 0=disabled, 1=enabled
3442 *
3443 * 0001 0000
3444 */
3445 write_reg(info, CHA + CCR2, 0x10);
3446
3447 /* CCR3
3448 *
3449 * 07..01 Reserved, 0
3450 * 00 PSD DPLL Phase Shift Disable
3451 *
3452 * 0000 0000
3453 */
3454 write_reg(info, CHA + CCR3, 0);
3455
3456 /* CCR4
3457 *
3458 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3459 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3460 * 05 TST1 Test Pin, 0=normal operation
3461 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3462 * 03..00 Reserved, must be 0
3463 *
3464 * 0101 0000
3465 */
3466 write_reg(info, CHA + CCR4, 0x50);
3467 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3468
3469 /* DAFO Data Format
3470 *
3471 * 07 Reserved, 0
3472 * 06 XBRK transmit break, 0=normal operation
3473 * 05 Stop bits (0=1, 1=2)
3474 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3475 * 02 PAREN Parity Enable
3476 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3477 *
3478 */
3479 val = 0x00;
3480 if (info->params.data_bits != 8)
3481 val |= BIT0; /* 7 bits */
3482 if (info->params.stop_bits != 1)
3483 val |= BIT5;
3484 if (info->params.parity != ASYNC_PARITY_NONE)
3485 {
3486 val |= BIT2; /* Parity enable */
3487 if (info->params.parity == ASYNC_PARITY_ODD)
3488 val |= BIT3;
3489 else
3490 val |= BIT4;
3491 }
3492 write_reg(info, CHA + DAFO, val);
3493
3494 /* RFC Rx FIFO Control
3495 *
3496 * 07 Reserved, 0
3497 * 06 DPS, 1=parity bit not stored in data byte
3498 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3499 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3500 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3501 * 01 Reserved, 0
3502 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3503 *
3504 * 0101 1100
3505 */
3506 write_reg(info, CHA + RFC, 0x5c);
3507
3508 /* RLCR Receive length check register
3509 *
3510 * Max frame length = (RL + 1) * 32
3511 */
3512 write_reg(info, CHA + RLCR, 0);
3513
3514 /* XBCH Transmit Byte Count High
3515 *
3516 * 07 DMA mode, 0 = interrupt driven
3517 * 06 NRM, 0=ABM (ignored)
3518 * 05 CAS Carrier Auto Start
3519 * 04 XC Transmit Continuously (ignored)
3520 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3521 *
3522 * 0000 0000
3523 */
3524 val = 0x00;
3525 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3526 val |= BIT5;
3527 write_reg(info, CHA + XBCH, val);
3528 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3529 irq_enable(info, CHA, IRQ_CTS);
3530
3531 /* MODE:03 RAC Receiver Active, 1=active */
3532 set_reg_bits(info, CHA + MODE, BIT3);
3533 enable_auxclk(info);
3534 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3535 irq_enable(info, CHB, IRQ_CTS);
3536 /* PVR[3] 1=AUTO CTS active */
3537 set_reg_bits(info, CHA + PVR, BIT3);
3538 } else
3539 clear_reg_bits(info, CHA + PVR, BIT3);
3540 irq_enable(info, CHA,
3541 IRQ_RXEOM | IRQ_RXFIFO | IRQ_BREAK_ON | IRQ_RXTIME |
3542 IRQ_ALLSENT | IRQ_TXFIFO);
3543 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3544 wait_command_complete(info, CHA);
3545 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3546 }
3547
3548 /* Set the HDLC idle mode for the transmitter.
3549 */
tx_set_idle(MGSLPC_INFO * info)3550 static void tx_set_idle(MGSLPC_INFO *info)
3551 {
3552 /* Note: ESCC2 only supports flags and one idle modes */
3553 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3554 set_reg_bits(info, CHA + CCR1, BIT3);
3555 else
3556 clear_reg_bits(info, CHA + CCR1, BIT3);
3557 }
3558
3559 /* get state of the V24 status (input) signals.
3560 */
get_signals(MGSLPC_INFO * info)3561 static void get_signals(MGSLPC_INFO *info)
3562 {
3563 unsigned char status = 0;
3564
3565 /* preserve RTS and DTR */
3566 info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR;
3567
3568 if (read_reg(info, CHB + VSTR) & BIT7)
3569 info->serial_signals |= SerialSignal_DCD;
3570 if (read_reg(info, CHB + STAR) & BIT1)
3571 info->serial_signals |= SerialSignal_CTS;
3572
3573 status = read_reg(info, CHA + PVR);
3574 if (!(status & PVR_RI))
3575 info->serial_signals |= SerialSignal_RI;
3576 if (!(status & PVR_DSR))
3577 info->serial_signals |= SerialSignal_DSR;
3578 }
3579
3580 /* Set the state of RTS and DTR based on contents of
3581 * serial_signals member of device extension.
3582 */
set_signals(MGSLPC_INFO * info)3583 static void set_signals(MGSLPC_INFO *info)
3584 {
3585 unsigned char val;
3586
3587 val = read_reg(info, CHA + MODE);
3588 if (info->params.mode == MGSL_MODE_ASYNC) {
3589 if (info->serial_signals & SerialSignal_RTS)
3590 val &= ~BIT6;
3591 else
3592 val |= BIT6;
3593 } else {
3594 if (info->serial_signals & SerialSignal_RTS)
3595 val |= BIT2;
3596 else
3597 val &= ~BIT2;
3598 }
3599 write_reg(info, CHA + MODE, val);
3600
3601 if (info->serial_signals & SerialSignal_DTR)
3602 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3603 else
3604 set_reg_bits(info, CHA + PVR, PVR_DTR);
3605 }
3606
rx_reset_buffers(MGSLPC_INFO * info)3607 static void rx_reset_buffers(MGSLPC_INFO *info)
3608 {
3609 RXBUF *buf;
3610 int i;
3611
3612 info->rx_put = 0;
3613 info->rx_get = 0;
3614 info->rx_frame_count = 0;
3615 for (i=0 ; i < info->rx_buf_count ; i++) {
3616 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3617 buf->status = buf->count = 0;
3618 }
3619 }
3620
3621 /* Attempt to return a received HDLC frame
3622 * Only frames received without errors are returned.
3623 *
3624 * Returns true if frame returned, otherwise false
3625 */
rx_get_frame(MGSLPC_INFO * info,struct tty_struct * tty)3626 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3627 {
3628 unsigned short status;
3629 RXBUF *buf;
3630 unsigned int framesize = 0;
3631 unsigned long flags;
3632 bool return_frame = false;
3633
3634 if (info->rx_frame_count == 0)
3635 return false;
3636
3637 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3638
3639 status = buf->status;
3640
3641 /* 07 VFR 1=valid frame
3642 * 06 RDO 1=data overrun
3643 * 05 CRC 1=OK, 0=error
3644 * 04 RAB 1=frame aborted
3645 */
3646 if ((status & 0xf0) != 0xA0) {
3647 if (!(status & BIT7) || (status & BIT4))
3648 info->icount.rxabort++;
3649 else if (status & BIT6)
3650 info->icount.rxover++;
3651 else if (!(status & BIT5)) {
3652 info->icount.rxcrc++;
3653 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3654 return_frame = true;
3655 }
3656 framesize = 0;
3657 #if SYNCLINK_GENERIC_HDLC
3658 {
3659 info->netdev->stats.rx_errors++;
3660 info->netdev->stats.rx_frame_errors++;
3661 }
3662 #endif
3663 } else
3664 return_frame = true;
3665
3666 if (return_frame)
3667 framesize = buf->count;
3668
3669 if (debug_level >= DEBUG_LEVEL_BH)
3670 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3671 __FILE__, __LINE__, info->device_name, status, framesize);
3672
3673 if (debug_level >= DEBUG_LEVEL_DATA)
3674 trace_block(info, buf->data, framesize, 0);
3675
3676 if (framesize) {
3677 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3678 framesize+1 > info->max_frame_size) ||
3679 framesize > info->max_frame_size)
3680 info->icount.rxlong++;
3681 else {
3682 if (status & BIT5)
3683 info->icount.rxok++;
3684
3685 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3686 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3687 ++framesize;
3688 }
3689
3690 #if SYNCLINK_GENERIC_HDLC
3691 if (info->netcount)
3692 hdlcdev_rx(info, buf->data, framesize);
3693 else
3694 #endif
3695 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3696 }
3697 }
3698
3699 spin_lock_irqsave(&info->lock, flags);
3700 buf->status = buf->count = 0;
3701 info->rx_frame_count--;
3702 info->rx_get++;
3703 if (info->rx_get >= info->rx_buf_count)
3704 info->rx_get = 0;
3705 spin_unlock_irqrestore(&info->lock, flags);
3706
3707 return true;
3708 }
3709
register_test(MGSLPC_INFO * info)3710 static bool register_test(MGSLPC_INFO *info)
3711 {
3712 static unsigned char patterns[] =
3713 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3714 static unsigned int count = ARRAY_SIZE(patterns);
3715 unsigned int i;
3716 bool rc = true;
3717 unsigned long flags;
3718
3719 spin_lock_irqsave(&info->lock, flags);
3720 reset_device(info);
3721
3722 for (i = 0; i < count; i++) {
3723 write_reg(info, XAD1, patterns[i]);
3724 write_reg(info, XAD2, patterns[(i + 1) % count]);
3725 if ((read_reg(info, XAD1) != patterns[i]) ||
3726 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3727 rc = false;
3728 break;
3729 }
3730 }
3731
3732 spin_unlock_irqrestore(&info->lock, flags);
3733 return rc;
3734 }
3735
irq_test(MGSLPC_INFO * info)3736 static bool irq_test(MGSLPC_INFO *info)
3737 {
3738 unsigned long end_time;
3739 unsigned long flags;
3740
3741 spin_lock_irqsave(&info->lock, flags);
3742 reset_device(info);
3743
3744 info->testing_irq = true;
3745 hdlc_mode(info);
3746
3747 info->irq_occurred = false;
3748
3749 /* init hdlc mode */
3750
3751 irq_enable(info, CHA, IRQ_TIMER);
3752 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3753 issue_command(info, CHA, CMD_START_TIMER);
3754
3755 spin_unlock_irqrestore(&info->lock, flags);
3756
3757 end_time=100;
3758 while(end_time-- && !info->irq_occurred) {
3759 msleep_interruptible(10);
3760 }
3761
3762 info->testing_irq = false;
3763
3764 spin_lock_irqsave(&info->lock, flags);
3765 reset_device(info);
3766 spin_unlock_irqrestore(&info->lock, flags);
3767
3768 return info->irq_occurred;
3769 }
3770
adapter_test(MGSLPC_INFO * info)3771 static int adapter_test(MGSLPC_INFO *info)
3772 {
3773 if (!register_test(info)) {
3774 info->init_error = DiagStatus_AddressFailure;
3775 printk("%s(%d):Register test failure for device %s Addr=%04X\n",
3776 __FILE__, __LINE__, info->device_name, (unsigned short)(info->io_base));
3777 return -ENODEV;
3778 }
3779
3780 if (!irq_test(info)) {
3781 info->init_error = DiagStatus_IrqFailure;
3782 printk("%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3783 __FILE__, __LINE__, info->device_name, (unsigned short)(info->irq_level));
3784 return -ENODEV;
3785 }
3786
3787 if (debug_level >= DEBUG_LEVEL_INFO)
3788 printk("%s(%d):device %s passed diagnostics\n",
3789 __FILE__, __LINE__, info->device_name);
3790 return 0;
3791 }
3792
trace_block(MGSLPC_INFO * info,const char * data,int count,int xmit)3793 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3794 {
3795 int i;
3796 int linecount;
3797 if (xmit)
3798 printk("%s tx data:\n", info->device_name);
3799 else
3800 printk("%s rx data:\n", info->device_name);
3801
3802 while(count) {
3803 if (count > 16)
3804 linecount = 16;
3805 else
3806 linecount = count;
3807
3808 for(i=0;i<linecount;i++)
3809 printk("%02X ", (unsigned char)data[i]);
3810 for(;i<17;i++)
3811 printk(" ");
3812 for(i=0;i<linecount;i++) {
3813 if (data[i]>=040 && data[i]<=0176)
3814 printk("%c", data[i]);
3815 else
3816 printk(".");
3817 }
3818 printk("\n");
3819
3820 data += linecount;
3821 count -= linecount;
3822 }
3823 }
3824
3825 /* HDLC frame time out
3826 * update stats and do tx completion processing
3827 */
tx_timeout(struct timer_list * t)3828 static void tx_timeout(struct timer_list *t)
3829 {
3830 MGSLPC_INFO *info = from_timer(info, t, tx_timer);
3831 unsigned long flags;
3832
3833 if (debug_level >= DEBUG_LEVEL_INFO)
3834 printk("%s(%d):tx_timeout(%s)\n",
3835 __FILE__, __LINE__, info->device_name);
3836 if (info->tx_active &&
3837 info->params.mode == MGSL_MODE_HDLC) {
3838 info->icount.txtimeout++;
3839 }
3840 spin_lock_irqsave(&info->lock, flags);
3841 info->tx_active = false;
3842 info->tx_count = info->tx_put = info->tx_get = 0;
3843
3844 spin_unlock_irqrestore(&info->lock, flags);
3845
3846 #if SYNCLINK_GENERIC_HDLC
3847 if (info->netcount)
3848 hdlcdev_tx_done(info);
3849 else
3850 #endif
3851 {
3852 struct tty_struct *tty = tty_port_tty_get(&info->port);
3853 bh_transmit(info, tty);
3854 tty_kref_put(tty);
3855 }
3856 }
3857
3858 #if SYNCLINK_GENERIC_HDLC
3859
3860 /**
3861 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3862 * set encoding and frame check sequence (FCS) options
3863 *
3864 * dev pointer to network device structure
3865 * encoding serial encoding setting
3866 * parity FCS setting
3867 *
3868 * returns 0 if success, otherwise error code
3869 */
hdlcdev_attach(struct net_device * dev,unsigned short encoding,unsigned short parity)3870 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3871 unsigned short parity)
3872 {
3873 MGSLPC_INFO *info = dev_to_port(dev);
3874 struct tty_struct *tty;
3875 unsigned char new_encoding;
3876 unsigned short new_crctype;
3877
3878 /* return error if TTY interface open */
3879 if (info->port.count)
3880 return -EBUSY;
3881
3882 switch (encoding)
3883 {
3884 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
3885 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3886 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3887 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3888 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3889 default: return -EINVAL;
3890 }
3891
3892 switch (parity)
3893 {
3894 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
3895 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3896 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3897 default: return -EINVAL;
3898 }
3899
3900 info->params.encoding = new_encoding;
3901 info->params.crc_type = new_crctype;
3902
3903 /* if network interface up, reprogram hardware */
3904 if (info->netcount) {
3905 tty = tty_port_tty_get(&info->port);
3906 mgslpc_program_hw(info, tty);
3907 tty_kref_put(tty);
3908 }
3909
3910 return 0;
3911 }
3912
3913 /**
3914 * called by generic HDLC layer to send frame
3915 *
3916 * skb socket buffer containing HDLC frame
3917 * dev pointer to network device structure
3918 */
hdlcdev_xmit(struct sk_buff * skb,struct net_device * dev)3919 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3920 struct net_device *dev)
3921 {
3922 MGSLPC_INFO *info = dev_to_port(dev);
3923 unsigned long flags;
3924
3925 if (debug_level >= DEBUG_LEVEL_INFO)
3926 printk(KERN_INFO "%s:hdlc_xmit(%s)\n", __FILE__, dev->name);
3927
3928 /* stop sending until this frame completes */
3929 netif_stop_queue(dev);
3930
3931 /* copy data to device buffers */
3932 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3933 info->tx_get = 0;
3934 info->tx_put = info->tx_count = skb->len;
3935
3936 /* update network statistics */
3937 dev->stats.tx_packets++;
3938 dev->stats.tx_bytes += skb->len;
3939
3940 /* done with socket buffer, so free it */
3941 dev_kfree_skb(skb);
3942
3943 /* save start time for transmit timeout detection */
3944 netif_trans_update(dev);
3945
3946 /* start hardware transmitter if necessary */
3947 spin_lock_irqsave(&info->lock, flags);
3948 if (!info->tx_active) {
3949 struct tty_struct *tty = tty_port_tty_get(&info->port);
3950 tx_start(info, tty);
3951 tty_kref_put(tty);
3952 }
3953 spin_unlock_irqrestore(&info->lock, flags);
3954
3955 return NETDEV_TX_OK;
3956 }
3957
3958 /**
3959 * called by network layer when interface enabled
3960 * claim resources and initialize hardware
3961 *
3962 * dev pointer to network device structure
3963 *
3964 * returns 0 if success, otherwise error code
3965 */
hdlcdev_open(struct net_device * dev)3966 static int hdlcdev_open(struct net_device *dev)
3967 {
3968 MGSLPC_INFO *info = dev_to_port(dev);
3969 struct tty_struct *tty;
3970 int rc;
3971 unsigned long flags;
3972
3973 if (debug_level >= DEBUG_LEVEL_INFO)
3974 printk("%s:hdlcdev_open(%s)\n", __FILE__, dev->name);
3975
3976 /* generic HDLC layer open processing */
3977 rc = hdlc_open(dev);
3978 if (rc != 0)
3979 return rc;
3980
3981 /* arbitrate between network and tty opens */
3982 spin_lock_irqsave(&info->netlock, flags);
3983 if (info->port.count != 0 || info->netcount != 0) {
3984 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
3985 spin_unlock_irqrestore(&info->netlock, flags);
3986 return -EBUSY;
3987 }
3988 info->netcount=1;
3989 spin_unlock_irqrestore(&info->netlock, flags);
3990
3991 tty = tty_port_tty_get(&info->port);
3992 /* claim resources and init adapter */
3993 rc = startup(info, tty);
3994 if (rc != 0) {
3995 tty_kref_put(tty);
3996 spin_lock_irqsave(&info->netlock, flags);
3997 info->netcount=0;
3998 spin_unlock_irqrestore(&info->netlock, flags);
3999 return rc;
4000 }
4001 /* assert RTS and DTR, apply hardware settings */
4002 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
4003 mgslpc_program_hw(info, tty);
4004 tty_kref_put(tty);
4005
4006 /* enable network layer transmit */
4007 netif_trans_update(dev);
4008 netif_start_queue(dev);
4009
4010 /* inform generic HDLC layer of current DCD status */
4011 spin_lock_irqsave(&info->lock, flags);
4012 get_signals(info);
4013 spin_unlock_irqrestore(&info->lock, flags);
4014 if (info->serial_signals & SerialSignal_DCD)
4015 netif_carrier_on(dev);
4016 else
4017 netif_carrier_off(dev);
4018 return 0;
4019 }
4020
4021 /**
4022 * called by network layer when interface is disabled
4023 * shutdown hardware and release resources
4024 *
4025 * dev pointer to network device structure
4026 *
4027 * returns 0 if success, otherwise error code
4028 */
hdlcdev_close(struct net_device * dev)4029 static int hdlcdev_close(struct net_device *dev)
4030 {
4031 MGSLPC_INFO *info = dev_to_port(dev);
4032 struct tty_struct *tty = tty_port_tty_get(&info->port);
4033 unsigned long flags;
4034
4035 if (debug_level >= DEBUG_LEVEL_INFO)
4036 printk("%s:hdlcdev_close(%s)\n", __FILE__, dev->name);
4037
4038 netif_stop_queue(dev);
4039
4040 /* shutdown adapter and release resources */
4041 shutdown(info, tty);
4042 tty_kref_put(tty);
4043 hdlc_close(dev);
4044
4045 spin_lock_irqsave(&info->netlock, flags);
4046 info->netcount=0;
4047 spin_unlock_irqrestore(&info->netlock, flags);
4048
4049 return 0;
4050 }
4051
4052 /**
4053 * called by network layer to process IOCTL call to network device
4054 *
4055 * dev pointer to network device structure
4056 * ifs pointer to network interface settings structure
4057 *
4058 * returns 0 if success, otherwise error code
4059 */
hdlcdev_wan_ioctl(struct net_device * dev,struct if_settings * ifs)4060 static int hdlcdev_wan_ioctl(struct net_device *dev, struct if_settings *ifs)
4061 {
4062 const size_t size = sizeof(sync_serial_settings);
4063 sync_serial_settings new_line;
4064 sync_serial_settings __user *line = ifs->ifs_ifsu.sync;
4065 MGSLPC_INFO *info = dev_to_port(dev);
4066 unsigned int flags;
4067
4068 if (debug_level >= DEBUG_LEVEL_INFO)
4069 printk("%s:hdlcdev_ioctl(%s)\n", __FILE__, dev->name);
4070
4071 /* return error if TTY interface open */
4072 if (info->port.count)
4073 return -EBUSY;
4074
4075 memset(&new_line, 0, size);
4076
4077 switch (ifs->type) {
4078 case IF_GET_IFACE: /* return current sync_serial_settings */
4079
4080 ifs->type = IF_IFACE_SYNC_SERIAL;
4081 if (ifs->size < size) {
4082 ifs->size = size; /* data size wanted */
4083 return -ENOBUFS;
4084 }
4085
4086 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4087 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4088 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4089 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4090
4091 switch (flags){
4092 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4093 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4094 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4095 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4096 default: new_line.clock_type = CLOCK_DEFAULT;
4097 }
4098
4099 new_line.clock_rate = info->params.clock_speed;
4100 new_line.loopback = info->params.loopback ? 1:0;
4101
4102 if (copy_to_user(line, &new_line, size))
4103 return -EFAULT;
4104 return 0;
4105
4106 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4107
4108 if(!capable(CAP_NET_ADMIN))
4109 return -EPERM;
4110 if (copy_from_user(&new_line, line, size))
4111 return -EFAULT;
4112
4113 switch (new_line.clock_type)
4114 {
4115 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4116 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4117 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4118 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4119 case CLOCK_DEFAULT: flags = info->params.flags &
4120 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4121 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4122 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4123 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4124 default: return -EINVAL;
4125 }
4126
4127 if (new_line.loopback != 0 && new_line.loopback != 1)
4128 return -EINVAL;
4129
4130 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4131 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4132 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4133 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4134 info->params.flags |= flags;
4135
4136 info->params.loopback = new_line.loopback;
4137
4138 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4139 info->params.clock_speed = new_line.clock_rate;
4140 else
4141 info->params.clock_speed = 0;
4142
4143 /* if network interface up, reprogram hardware */
4144 if (info->netcount) {
4145 struct tty_struct *tty = tty_port_tty_get(&info->port);
4146 mgslpc_program_hw(info, tty);
4147 tty_kref_put(tty);
4148 }
4149 return 0;
4150 default:
4151 return hdlc_ioctl(dev, ifs);
4152 }
4153 }
4154
4155 /**
4156 * called by network layer when transmit timeout is detected
4157 *
4158 * dev pointer to network device structure
4159 */
hdlcdev_tx_timeout(struct net_device * dev,unsigned int txqueue)4160 static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue)
4161 {
4162 MGSLPC_INFO *info = dev_to_port(dev);
4163 unsigned long flags;
4164
4165 if (debug_level >= DEBUG_LEVEL_INFO)
4166 printk("hdlcdev_tx_timeout(%s)\n", dev->name);
4167
4168 dev->stats.tx_errors++;
4169 dev->stats.tx_aborted_errors++;
4170
4171 spin_lock_irqsave(&info->lock, flags);
4172 tx_stop(info);
4173 spin_unlock_irqrestore(&info->lock, flags);
4174
4175 netif_wake_queue(dev);
4176 }
4177
4178 /**
4179 * called by device driver when transmit completes
4180 * reenable network layer transmit if stopped
4181 *
4182 * info pointer to device instance information
4183 */
hdlcdev_tx_done(MGSLPC_INFO * info)4184 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4185 {
4186 if (netif_queue_stopped(info->netdev))
4187 netif_wake_queue(info->netdev);
4188 }
4189
4190 /**
4191 * called by device driver when frame received
4192 * pass frame to network layer
4193 *
4194 * info pointer to device instance information
4195 * buf pointer to buffer contianing frame data
4196 * size count of data bytes in buf
4197 */
hdlcdev_rx(MGSLPC_INFO * info,char * buf,int size)4198 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4199 {
4200 struct sk_buff *skb = dev_alloc_skb(size);
4201 struct net_device *dev = info->netdev;
4202
4203 if (debug_level >= DEBUG_LEVEL_INFO)
4204 printk("hdlcdev_rx(%s)\n", dev->name);
4205
4206 if (skb == NULL) {
4207 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4208 dev->stats.rx_dropped++;
4209 return;
4210 }
4211
4212 skb_put_data(skb, buf, size);
4213
4214 skb->protocol = hdlc_type_trans(skb, dev);
4215
4216 dev->stats.rx_packets++;
4217 dev->stats.rx_bytes += size;
4218
4219 netif_rx(skb);
4220 }
4221
4222 static const struct net_device_ops hdlcdev_ops = {
4223 .ndo_open = hdlcdev_open,
4224 .ndo_stop = hdlcdev_close,
4225 .ndo_start_xmit = hdlc_start_xmit,
4226 .ndo_siocwandev = hdlcdev_wan_ioctl,
4227 .ndo_tx_timeout = hdlcdev_tx_timeout,
4228 };
4229
4230 /**
4231 * called by device driver when adding device instance
4232 * do generic HDLC initialization
4233 *
4234 * info pointer to device instance information
4235 *
4236 * returns 0 if success, otherwise error code
4237 */
hdlcdev_init(MGSLPC_INFO * info)4238 static int hdlcdev_init(MGSLPC_INFO *info)
4239 {
4240 int rc;
4241 struct net_device *dev;
4242 hdlc_device *hdlc;
4243
4244 /* allocate and initialize network and HDLC layer objects */
4245
4246 dev = alloc_hdlcdev(info);
4247 if (dev == NULL) {
4248 printk(KERN_ERR "%s:hdlc device allocation failure\n", __FILE__);
4249 return -ENOMEM;
4250 }
4251
4252 /* for network layer reporting purposes only */
4253 dev->base_addr = info->io_base;
4254 dev->irq = info->irq_level;
4255
4256 /* network layer callbacks and settings */
4257 dev->netdev_ops = &hdlcdev_ops;
4258 dev->watchdog_timeo = 10 * HZ;
4259 dev->tx_queue_len = 50;
4260
4261 /* generic HDLC layer callbacks and settings */
4262 hdlc = dev_to_hdlc(dev);
4263 hdlc->attach = hdlcdev_attach;
4264 hdlc->xmit = hdlcdev_xmit;
4265
4266 /* register objects with HDLC layer */
4267 rc = register_hdlc_device(dev);
4268 if (rc) {
4269 printk(KERN_WARNING "%s:unable to register hdlc device\n", __FILE__);
4270 free_netdev(dev);
4271 return rc;
4272 }
4273
4274 info->netdev = dev;
4275 return 0;
4276 }
4277
4278 /**
4279 * called by device driver when removing device instance
4280 * do generic HDLC cleanup
4281 *
4282 * info pointer to device instance information
4283 */
hdlcdev_exit(MGSLPC_INFO * info)4284 static void hdlcdev_exit(MGSLPC_INFO *info)
4285 {
4286 unregister_hdlc_device(info->netdev);
4287 free_netdev(info->netdev);
4288 info->netdev = NULL;
4289 }
4290
4291 #endif /* CONFIG_HDLC */
4292
4293