Searched refs:RADEON_NUM_RINGS (Results 1 – 10 of 10) sorted by relevance
456 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_any_seq_signaled()491 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()512 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()538 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_timeout()598 uint64_t seq[RADEON_NUM_RINGS]; in radeon_fence_wait_any()602 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_any()636 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_next()663 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_empty()796 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_note_sync()873 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_fence_driver_init_ring()[all …]
63 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_bo_manager_init()230 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_event()267 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_bo_next_hole()319 struct radeon_fence *fences[RADEON_NUM_RINGS]; in radeon_sa_bo_new()320 unsigned tries[RADEON_NUM_RINGS]; in radeon_sa_bo_new()337 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sa_bo_new()352 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sa_bo_new()357 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sa_bo_new()
48 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sync_create()128 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sync_rings()
1297 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_device_init()1300 rdev->fence_context = dma_fence_context_alloc(RADEON_NUM_RINGS); in radeon_device_init()1602 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_suspend_kms()1765 unsigned ring_sizes[RADEON_NUM_RINGS]; in radeon_gpu_reset()1766 uint32_t *ring_data[RADEON_NUM_RINGS]; in radeon_gpu_reset()1788 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()1806 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()
121 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_preinstall_kms()175 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_uninstall_kms()
181 struct radeon_fence *best[RADEON_NUM_RINGS] = {}; in radeon_vm_grab_id()1007 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_vm_bo_update()1181 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_vm_init()1260 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_vm_fini()
263 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_ib_ring_tests()
158 #define RADEON_NUM_RINGS 8 macro368 uint64_t sync_seq[RADEON_NUM_RINGS];541 struct list_head flist[RADEON_NUM_RINGS];610 struct radeon_fence *sync_to[RADEON_NUM_RINGS];792 atomic_t ring_int[RADEON_NUM_RINGS];941 struct radeon_vm_id ids[RADEON_NUM_RINGS];1916 const struct radeon_asic_ring *ring[RADEON_NUM_RINGS];2407 struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS];2411 struct radeon_ring ring[RADEON_NUM_RINGS];
530 for (i = 1; i < RADEON_NUM_RINGS; ++i) { in radeon_test_syncing()
266 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_pm_set_clocks()1148 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_dpm_change_power_state_locked()1866 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_dynpm_idle_work_handler()