Searched refs:Pixel (Results 1 – 25 of 66) sorted by relevance
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| /linux-6.1.9/Documentation/devicetree/bindings/display/bridge/ |
| D | fsl,imx8qxp-pxl2dpi.yaml | 7 title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface
13 The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)
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| D | fsl,imx8qxp-pixel-link.yaml | 7 title: Freescale i.MX8qm/qxp Display Pixel Link
13 The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard
21 The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)
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| D | fsl,imx8qxp-pixel-combiner.yaml | 7 title: Freescale i.MX8qm/qxp Pixel Combiner
13 The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
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| D | snps,dw-mipi-dsi.yaml | 33 - description: Pixel clock for the DPI/RGB input
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| /linux-6.1.9/Documentation/devicetree/bindings/media/ |
| D | fsl-pxp.txt | 1 Freescale Pixel Pipeline
4 The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine
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| /linux-6.1.9/drivers/media/platform/nxp/ |
| D | Kconfig | 21 tristate "NXP i.MX Pixel Pipeline (PXP)"
27 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling,
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| /linux-6.1.9/Documentation/devicetree/bindings/gpu/ |
| D | arm,mali-utgard.yaml | 72 - pp # Pixel Processor broadcast interrupt (mali-450 only)
73 - pp0 # Pixel Processor X interrupt (X from 0 to 7)
74 - ppmmu0 # Pixel Processor X MMU interrupt (X from 0 to 7)
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| /linux-6.1.9/Documentation/devicetree/bindings/display/rockchip/ |
| D | rockchip-vop2.yaml | 48 - description: Pixel clock for video port 0.
49 - description: Pixel clock for video port 1.
50 - description: Pixel clock for video port 2.
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| /linux-6.1.9/Documentation/devicetree/bindings/clock/ |
| D | qcom,gcc-msm8976.yaml | 30 - description: Pixel clock from DSI PHY0
32 - description: Pixel clock from DSI PHY1
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| D | qcom,dispcc-sm6125.yaml | 28 - description: Pixel clock from DSI PHY0
29 - description: Pixel clock from DSI PHY1
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| D | qcom,sdm845-dispcc.yaml | 31 - description: Pixel clock from DSI PHY0
33 - description: Pixel clock from DSI PHY1
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| D | qcom,dispcc-sm8x50.yaml | 33 - description: Pixel clock from DSI PHY0
35 - description: Pixel clock from DSI PHY1
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| D | qcom,sm8450-dispcc.yaml | 32 - description: Pixel clock from DSI PHY0
34 - description: Pixel clock from DSI PHY1
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| D | qcom,sm6115-dispcc.yaml | 29 - description: Pixel clock from DSI PHY0
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| D | qcom,sc7180-dispcc.yaml | 27 - description: Pixel clock from DSI PHY
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| D | qcom,dispcc-sm6350.yaml | 27 - description: Pixel clock from DSI PHY
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| D | qcom,qcm2290-dispcc.yaml | 29 - description: Pixel clock from DSI PHY
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| D | qcom,sc7280-dispcc.yaml | 27 - description: Pixel clock from DSI PHY
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| /linux-6.1.9/Documentation/gpu/amdgpu/display/ |
| D | dc-glossary.rst | 31 Bits Per Pixel
34 * PCLK: Pixel Clock
41 * PPLL: Pixel PLL
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| /linux-6.1.9/drivers/video/fbdev/ |
| D | pxa3xx-regs.h | 91 #define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL)) argument
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| /linux-6.1.9/Documentation/driver-api/media/ |
| D | tx-rx.rst | 5 Pixel data transmitter and receiver drivers
61 Pixel rate
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| /linux-6.1.9/Documentation/devicetree/bindings/display/samsung/ |
| D | samsung,exynos-hdmi.yaml | 123 - description: Pixel clock generated by HDMI-PHY.
149 - description: Pixel special clock, one of the two possible inputs
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| /linux-6.1.9/Documentation/devicetree/bindings/media/i2c/ |
| D | imx290.txt | 4 Square Pixel for Color Cameras. It is programmable through I2C and 4-wire
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| /linux-6.1.9/Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,dpi.yaml | 37 - description: Pixel Clock
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| /linux-6.1.9/Documentation/devicetree/bindings/display/ |
| D | fsl,lcdif.yaml | 40 - description: Pixel clock
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