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/linux-6.1.9/drivers/pwm/
DKconfig2 menuconfig PWM config
3 bool "Pulse-Width Modulation (PWM) Support"
5 Generic Pulse-Width Modulation (PWM) support.
14 This framework provides a generic interface to PWM devices
16 to register and unregister a PWM chip, an abstraction of a PWM
17 controller, that supports one or more PWM devices. Client
18 drivers can request PWM devices and use the generic framework
21 This generic framework replaces the legacy PWM framework which
30 if PWM
37 bool "PWM lowlevel drivers additional checks and debug messages"
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/linux-6.1.9/Documentation/driver-api/
Dpwm.rst2 Pulse Width Modulation (PWM) interface
5 This provides an overview about the Linux PWM interface
9 the Linux PWM API (although they could). However, PWMs are often
12 this kind of flexibility the generic PWM API exists.
17 Users of the legacy PWM API use unique IDs to refer to PWM devices.
19 Instead of referring to a PWM device via its unique ID, board setup code
20 should instead register a static mapping that can be used to match PWM
38 Legacy users can request a PWM device using pwm_request() and free it
42 device or a consumer name. pwm_put() is used to free the PWM device. Managed
45 After being requested, a PWM has to be configured using::
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Dmiscellaneous.rst24 Pulse-Width Modulation (PWM)
30 The PWM framework provides an abstraction for providers and consumers of
31 PWM signals. A controller that provides one or more PWM signals is
36 A chip exposes one or more PWM signal sources, each of which exposed as
38 performed on PWM devices to control the period, duty cycle, polarity and
41 Note that PWM devices are exclusive resources: they can always only be
/linux-6.1.9/Documentation/devicetree/bindings/pwm/
Dpwm.txt1 Specifying PWM information for devices
4 1) PWM user nodes
7 PWM users should specify a list of PWM devices that they want to use
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
16 PWM properties should be named "pwms". The exact meaning of each pwms
19 each of the PWM devices listed in the "pwms" property. If no "pwm-names"
22 Drivers for devices that use more than a single PWM device can use the
23 "pwm-names" property to map the name of the PWM device requested by the
26 The following example could be used to describe a PWM-based backlight
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Dpwm-samsung.yaml7 title: Samsung SoC PWM timers
14 Samsung SoCs contain PWM timer blocks which can be used for system clock source
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16 PWM timer block provides 5 PWM channels (not all of them can drive physical
40 - "timers" - PWM base clock used to generate PWM signals,
42 - "pwm-tclk0" - first external PWM clock source,
43 - "pwm-tclk1" - second external PWM clock source.
64 use PWM clocksource.
76 A list of PWM channels used as PWM outputs on particular platform.
77 It is an array of up to 5 elements being indices of PWM channels
Dpwm-lp3943.txt1 TI/National Semiconductor LP3943 PWM controller
9 - ti,pwm0 or ti,pwm1: Output pin number(s) for PWM channel 0 or 1.
17 PWM 0 is for RGB LED brightness control
18 PWM 1 is for brightness control of LP8557 backlight device
26 * PWM 0 : output 8, 9 and 10
27 * PWM 1 : output 15
39 /* LEDs control with PWM 0 of LP3943 */
50 /* Backlight control with PWM 1 of LP3943 */
Dpxa-pwm.txt1 Marvell PWM controller
9 - reg: Physical base address and length of the registers used by the PWM channel
10 Note that one device instance must be created for each PWM that is used, so the
11 length covers only the register window for one PWM output, not that of the
12 entire PWM controller. Currently length is 0x10 for all supported devices.
16 Example PWM device node:
24 Example PWM client node:
Dpwm-sprd.txt1 Spreadtrum PWM controller
3 Spreadtrum SoCs PWM controller provides 4 PWM channels.
10 "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3).
11 "enablen": for PWM channel n enable clock (n range: 0 ~ 3).
16 - assigned-clocks: Reference to the PWM clock entries.
17 - assigned-clock-parents: The phandle of the parent clock of PWM clock.
Dgoogle,cros-ec-pwm.yaml7 title: PWM controlled by ChromeOS EC
14 Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller
16 An EC PWM node should be only found as a sub-node of the EC node (see
25 - description: PWM controlled using EC_PWM_TYPE_GENERIC channels.
28 - description: PWM controlled using CROS_EC_PWM_DT_<...> types.
33 description: The cell specifies the PWM index.
Dpwm-mediatek.txt1 MediaTek PWM controller
18 - clocks: phandle and clock specifier of the PWM reference clock.
22 - "main": clock used by the PWM core
23 - "pwm1-3": the three per PWM clocks for mt8365
24 - "pwm1-8": the eight per PWM clocks for mt2712
25 - "pwm1-6": the six per PWM clocks for mt7622
26 - "pwm1-5": the five per PWM clocks for mt7623
33 - assigned-clocks: Reference to the PWM clock entries.
34 - assigned-clock-parents: The phandle of the parent clock of PWM clock.
Dpwm-sifive.yaml8 title: SiFive PWM controller
15 Unlike most other PWM controllers, the SiFive PWM controller currently
16 only supports one period for all channels in the PWM. All PWMs need to
19 achievable period. PWM RTL that corresponds to the IP block version
37 "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
39 SiFive PWM v0 IP block with no chip integration tweaks.
54 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
Dpwm-st.txt1 STMicroelectronics PWM driver bindings
6 - #pwm-cells : Number of cells used to specify a PWM. First cell
7 specifies the per-chip index of the PWM to use and the
14 for PWM module.
17 - clocks: phandle of the clock used by the PWM module.
22 - st,pwm-num-chan: Number of available PWM channels. Default is 0.
/linux-6.1.9/Documentation/ABI/testing/
Dsysfs-class-pwm6 The pwm/ class sub-directory belongs to the Generic PWM
7 Framework and provides a sysfs interface for using PWM
16 probed PWM controller/chip where N is the base of the
17 PWM chip.
24 The number of PWM channels supported by the PWM chip.
31 Exports a PWM channel from the PWM chip for sysfs control.
39 Unexports a PWM channel.
47 each exported PWM channel where X is the exported PWM
55 Sets the PWM signal period in nanoseconds.
62 Sets the PWM signal duty cycle in nanoseconds.
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Dsysfs-class-backlight-driver-lm353345 Set the PWM-input control mask (5 bits), where:
48 bit 5 PWM-input enabled in Zone 4
49 bit 4 PWM-input enabled in Zone 3
50 bit 3 PWM-input enabled in Zone 2
51 bit 2 PWM-input enabled in Zone 1
52 bit 1 PWM-input enabled in Zone 0
53 bit 0 PWM-input enabled
Dsysfs-class-led-driver-lm353364 Set the PWM-input control mask (5 bits), where:
67 bit 5 PWM-input enabled in Zone 4
68 bit 4 PWM-input enabled in Zone 3
69 bit 3 PWM-input enabled in Zone 2
70 bit 2 PWM-input enabled in Zone 1
71 bit 1 PWM-input enabled in Zone 0
72 bit 0 PWM-input enabled
/linux-6.1.9/arch/mips/loongson32/
DKconfig39 bool "Use PWM Timer for clockevent/clocksource"
43 This option changes the default clockevent/clocksource to PWM Timer,
54 bool "Use PWM Timer 0"
56 Use PWM Timer 0 as the default clockevent/clocksourcer.
59 bool "Use PWM Timer 1"
61 Use PWM Timer 1 as the default clockevent/clocksourcer.
64 bool "Use PWM Timer 2"
66 Use PWM Timer 2 as the default clockevent/clocksourcer.
69 bool "Use PWM Timer 3"
71 Use PWM Timer 3 as the default clockevent/clocksourcer.
/linux-6.1.9/Documentation/devicetree/bindings/hwmon/
Daspeed-pwm-tacho.txt1 ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver
3 The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho
6 There can be upto 8 fans supported. Each fan can have one PWM output and
20 - pinctrl-0 : phandle referencing pin configuration of the PWM ports.
32 representing a fan. If there are 8 fans each fan can have one PWM port and
34 For PWM port can be configured cooling-levels to create cooling device.
38 - reg : should specify PWM source port.
39 integer value in the range 0 to 7 with 0 indicating PWM port A and
40 7 indicating PWM port H.
42 - cooling-levels: PWM duty cycle values in a range from 0 to 255
Dnpcm750-pwm-fan.txt1 Nuvoton NPCM7xx PWM and Fan Tacho controller device
3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
12 * "pwm" for the PWM registers.
16 * "pwm" for PWM controller operating clock.
20 - pinctrl-0 : phandle referencing pin configuration of the PWM and Fan
26 Each fan subnode must have one PWM channel and atleast one Fan tach channel.
28 For PWM channel can be configured cooling-levels to create cooling device.
32 - reg : specify the PWM output channel.
34 the PWM channel number that used.
43 - cooling-levels: PWM duty cycle values in a range from 0 to 255
/linux-6.1.9/Documentation/hwmon/
Dadt7475.rst59 for measuring fan speed. There are three (3) PWM outputs that can be used
62 A sophisticated control system for the PWM outputs is designed into the
64 three temperature sensors. Each PWM output is individually adjustable and
65 programmable. Once configured, the ADT747x will adjust the PWM outputs in
67 This feature can also be disabled for manual control of the PWM's.
121 an optimal configuration for the automatic PWM control.
126 The driver exposes two trip points per PWM channel.
128 - point1: Set the PWM speed at the lower temperature bound
129 - point2: Set the PWM speed at the higher temperature bound
131 The ADT747x will scale the PWM linearly between the lower and higher PWM
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Ddme1737.rst47 and PWM output control functions. Using this parameter
66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and
170 PWM Output Control
173 This chip features 5 PWM outputs. PWM outputs 1-3 are associated with fan
174 inputs 1-3 and PWM outputs 5-6 are associated with fan inputs 5-6. PWM outputs
176 the appropriate enable attribute accordingly. PWM outputs 5-6 can only operate
179 appropriate PWM attribute. In automatic mode, the PWM attribute returns the
180 current duty-cycle as set by the fan controller in the chip. All PWM outputs
183 In automatic mode, the chip supports the setting of the PWM ramp rate which
184 defines how fast the PWM output is adjusting to changes of the associated
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Dadt7470.rst25 There are four (4) PWM outputs that can be used to control fan speed.
27 A sophisticated control system for the PWM outputs is designed into the ADT7470
29 temperature sensors. Each PWM output is individually adjustable and
30 programmable. Once configured, the ADT7470 will adjust the PWM outputs in
32 feature can also be disabled for manual control of the PWM's.
51 determining an optimal configuration for the automatic PWM control.
58 * PWM Control
67 the temperature is between the two temperature boundaries. PWM values range
69 temperature sensor associated with the PWM control exceeds
72 The driver also allows control of the PWM frequency:
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Dmax31760.rst21 The MAX31760 integrates temperature sensing along with precision PWM fan
29 user-programmed PWM values. The flexible LUT-based architecture enables
49 1 PWM value for T < +18°C
50 2 PWM value for +18°C ≤ T < +20°C
51 3 PWM value for +20°C ≤ T < +22°C
53 47 PWM value for +108°C ≤ T < +110°C
54 48 PWM value for T ≥ +110°C
71 pwm1 PWM value for direct fan control
73 pwm1_freq PWM frequency in hertz
75 pwm1_auto_point[1-48]_pwm PWM value for LUT point
Dlm85.rst96 VID signals from the processor to the VRM. Lastly, there are three (3) PWM
110 A sophisticated control system for the PWM outputs is designed into the
112 three temperature sensors. Each PWM output is individually adjustable and
113 programmable. Once configured, the LM85 will adjust the PWM outputs in
115 This feature can also be disabled for manual control of the PWM's.
130 Both have special circuitry to compensate for PWM interactions with the
152 The ADT7468 has a high-frequency PWM mode, where all PWM outputs are
153 driven by a 22.5 kHz clock. This is a global mode, not per-PWM output,
154 which means that setting any PWM frequency above 11.3 kHz will switch
155 all 3 PWM outputs to a 22.5 kHz frequency. Conversely, setting any PWM
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/linux-6.1.9/drivers/leds/rgb/
DKconfig6 tristate "PWM driven multi-color LED Support"
7 depends on PWM
9 This option enables support for PWM driven monochrome LEDs that are
18 depends on PWM
22 wide variety of Qualcomm PMICs. The LPG consists of a number of PWM
25 a LED, grouped to represent a RGB LED or exposed as PWM channels.
/linux-6.1.9/Documentation/devicetree/bindings/clock/
Dpwm-clock.txt1 Binding for an external clock signal driven by a PWM pin.
3 This binding uses the common clock binding[1] and the common PWM binding[2].
11 - pwms : from common PWM binding; this determines the clock frequency
12 via the period given in the PWM specifier.
16 - clock-frequency : Exact output frequency, in case the PWM period

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