1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/arch/arm/mach-pxa/mfp-pxa2xx.c
4 *
5 * PXA2xx pin mux configuration support
6 *
7 * The GPIOs on PXA2xx can be configured as one of many alternate
8 * functions, this is by concept samilar to the MFP configuration
9 * on PXA3xx, what's more important, the low power pin state and
10 * wakeup detection are also supported by the same framework.
11 */
12 #include <linux/gpio.h>
13 #include <linux/gpio-pxa.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/io.h>
18 #include <linux/syscore_ops.h>
19 #include <linux/soc/pxa/cpu.h>
20
21 #include "pxa2xx-regs.h"
22 #include "mfp-pxa2xx.h"
23
24 #include "generic.h"
25
26 #define PGSR(x) __REG2(0x40F00020, (x) << 2)
27 #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
28 #define GAFR_L(x) __GAFR(0, x)
29 #define GAFR_U(x) __GAFR(1, x)
30
31 #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
32 #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
33 #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
34 #define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
35 #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
36
37 #define PWER_WE35 (1 << 24)
38
39 struct gpio_desc {
40 unsigned valid : 1;
41 unsigned can_wakeup : 1;
42 unsigned keypad_gpio : 1;
43 unsigned dir_inverted : 1;
44 unsigned int mask; /* bit mask in PWER or PKWR */
45 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
46 unsigned long config;
47 };
48
49 static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
50
51 static unsigned long gpdr_lpm[4];
52
__mfp_config_gpio(unsigned gpio,unsigned long c)53 static int __mfp_config_gpio(unsigned gpio, unsigned long c)
54 {
55 unsigned long gafr, mask = GPIO_bit(gpio);
56 int bank = gpio_to_bank(gpio);
57 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
58 int shft = (gpio & 0xf) << 1;
59 int fn = MFP_AF(c);
60 int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
61
62 if (fn > 3)
63 return -EINVAL;
64
65 /* alternate function and direction at run-time */
66 gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
67 gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
68
69 if (uorl == 0)
70 GAFR_L(bank) = gafr;
71 else
72 GAFR_U(bank) = gafr;
73
74 if (is_out ^ gpio_desc[gpio].dir_inverted)
75 GPDR(gpio) |= mask;
76 else
77 GPDR(gpio) &= ~mask;
78
79 /* alternate function and direction at low power mode */
80 switch (c & MFP_LPM_STATE_MASK) {
81 case MFP_LPM_DRIVE_HIGH:
82 PGSR(bank) |= mask;
83 is_out = 1;
84 break;
85 case MFP_LPM_DRIVE_LOW:
86 PGSR(bank) &= ~mask;
87 is_out = 1;
88 break;
89 case MFP_LPM_INPUT:
90 case MFP_LPM_DEFAULT:
91 break;
92 default:
93 /* warning and fall through, treat as MFP_LPM_DEFAULT */
94 pr_warn("%s: GPIO%d: unsupported low power mode\n",
95 __func__, gpio);
96 break;
97 }
98
99 if (is_out ^ gpio_desc[gpio].dir_inverted)
100 gpdr_lpm[bank] |= mask;
101 else
102 gpdr_lpm[bank] &= ~mask;
103
104 /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
105 * configurations of those pins not able to wakeup
106 */
107 if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
108 pr_warn("%s: GPIO%d unable to wakeup\n", __func__, gpio);
109 return -EINVAL;
110 }
111
112 if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
113 pr_warn("%s: output GPIO%d unable to wakeup\n", __func__, gpio);
114 return -EINVAL;
115 }
116
117 return 0;
118 }
119
__mfp_validate(int mfp)120 static inline int __mfp_validate(int mfp)
121 {
122 int gpio = mfp_to_gpio(mfp);
123
124 if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
125 pr_warn("%s: GPIO%d is invalid pin\n", __func__, gpio);
126 return -1;
127 }
128
129 return gpio;
130 }
131
pxa2xx_mfp_config(unsigned long * mfp_cfgs,int num)132 void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
133 {
134 unsigned long flags;
135 unsigned long *c;
136 int i, gpio;
137
138 for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
139
140 gpio = __mfp_validate(MFP_PIN(*c));
141 if (gpio < 0)
142 continue;
143
144 local_irq_save(flags);
145
146 gpio_desc[gpio].config = *c;
147 __mfp_config_gpio(gpio, *c);
148
149 local_irq_restore(flags);
150 }
151 }
152
pxa2xx_mfp_set_lpm(int mfp,unsigned long lpm)153 void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
154 {
155 unsigned long flags, c;
156 int gpio;
157
158 gpio = __mfp_validate(mfp);
159 if (gpio < 0)
160 return;
161
162 local_irq_save(flags);
163
164 c = gpio_desc[gpio].config;
165 c = (c & ~MFP_LPM_STATE_MASK) | lpm;
166 __mfp_config_gpio(gpio, c);
167
168 local_irq_restore(flags);
169 }
170
gpio_set_wake(unsigned int gpio,unsigned int on)171 int gpio_set_wake(unsigned int gpio, unsigned int on)
172 {
173 struct gpio_desc *d;
174 unsigned long c, mux_taken;
175
176 if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
177 return -EINVAL;
178
179 d = &gpio_desc[gpio];
180 c = d->config;
181
182 if (!d->valid)
183 return -EINVAL;
184
185 /* Allow keypad GPIOs to wakeup system when
186 * configured as generic GPIOs.
187 */
188 if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
189 (d->config & MFP_LPM_CAN_WAKEUP)) {
190 if (on)
191 PKWR |= d->mask;
192 else
193 PKWR &= ~d->mask;
194 return 0;
195 }
196
197 mux_taken = (PWER & d->mux_mask) & (~d->mask);
198 if (on && mux_taken)
199 return -EBUSY;
200
201 if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
202 if (on) {
203 PWER = (PWER & ~d->mux_mask) | d->mask;
204
205 if (c & MFP_LPM_EDGE_RISE)
206 PRER |= d->mask;
207 else
208 PRER &= ~d->mask;
209
210 if (c & MFP_LPM_EDGE_FALL)
211 PFER |= d->mask;
212 else
213 PFER &= ~d->mask;
214 } else {
215 PWER &= ~d->mask;
216 PRER &= ~d->mask;
217 PFER &= ~d->mask;
218 }
219 }
220 return 0;
221 }
222
223 #ifdef CONFIG_PXA25x
pxa25x_mfp_init(void)224 static void __init pxa25x_mfp_init(void)
225 {
226 int i;
227
228 /* running before pxa_gpio_probe() */
229 #ifdef CONFIG_CPU_PXA26x
230 pxa_last_gpio = 89;
231 #else
232 pxa_last_gpio = 84;
233 #endif
234 for (i = 0; i <= pxa_last_gpio; i++)
235 gpio_desc[i].valid = 1;
236
237 for (i = 0; i <= 15; i++) {
238 gpio_desc[i].can_wakeup = 1;
239 gpio_desc[i].mask = GPIO_bit(i);
240 }
241
242 /* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
243 * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
244 */
245 for (i = 86; i <= pxa_last_gpio; i++)
246 gpio_desc[i].dir_inverted = 1;
247 }
248 #else
pxa25x_mfp_init(void)249 static inline void pxa25x_mfp_init(void) {}
250 #endif /* CONFIG_PXA25x */
251
252 #ifdef CONFIG_PXA27x
253 static int pxa27x_pkwr_gpio[] = {
254 13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
255 95, 96, 97, 98, 99, 100, 101, 102
256 };
257
keypad_set_wake(unsigned int on)258 int keypad_set_wake(unsigned int on)
259 {
260 unsigned int i, gpio, mask = 0;
261 struct gpio_desc *d;
262
263 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
264
265 gpio = pxa27x_pkwr_gpio[i];
266 d = &gpio_desc[gpio];
267
268 /* skip if configured as generic GPIO */
269 if (MFP_AF(d->config) == 0)
270 continue;
271
272 if (d->config & MFP_LPM_CAN_WAKEUP)
273 mask |= gpio_desc[gpio].mask;
274 }
275
276 if (on)
277 PKWR |= mask;
278 else
279 PKWR &= ~mask;
280 return 0;
281 }
282
283 #define PWER_WEMUX2_GPIO38 (1 << 16)
284 #define PWER_WEMUX2_GPIO53 (2 << 16)
285 #define PWER_WEMUX2_GPIO40 (3 << 16)
286 #define PWER_WEMUX2_GPIO36 (4 << 16)
287 #define PWER_WEMUX2_MASK (7 << 16)
288 #define PWER_WEMUX3_GPIO31 (1 << 19)
289 #define PWER_WEMUX3_GPIO113 (2 << 19)
290 #define PWER_WEMUX3_MASK (3 << 19)
291
292 #define INIT_GPIO_DESC_MUXED(mux, gpio) \
293 do { \
294 gpio_desc[(gpio)].can_wakeup = 1; \
295 gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
296 gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
297 } while (0)
298
pxa27x_mfp_init(void)299 static void __init pxa27x_mfp_init(void)
300 {
301 int i, gpio;
302
303 pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
304 for (i = 0; i <= pxa_last_gpio; i++) {
305 /* skip GPIO2, 5, 6, 7, 8, they are not
306 * valid pins allow configuration
307 */
308 if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
309 continue;
310
311 gpio_desc[i].valid = 1;
312 }
313
314 /* Keypad GPIOs */
315 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
316 gpio = pxa27x_pkwr_gpio[i];
317 gpio_desc[gpio].can_wakeup = 1;
318 gpio_desc[gpio].keypad_gpio = 1;
319 gpio_desc[gpio].mask = 1 << i;
320 }
321
322 /* Overwrite GPIO13 as a PWER wakeup source */
323 for (i = 0; i <= 15; i++) {
324 /* skip GPIO2, 5, 6, 7, 8 */
325 if (GPIO_bit(i) & 0x1e4)
326 continue;
327
328 gpio_desc[i].can_wakeup = 1;
329 gpio_desc[i].mask = GPIO_bit(i);
330 }
331
332 gpio_desc[35].can_wakeup = 1;
333 gpio_desc[35].mask = PWER_WE35;
334
335 INIT_GPIO_DESC_MUXED(WEMUX3, 31);
336 INIT_GPIO_DESC_MUXED(WEMUX3, 113);
337 INIT_GPIO_DESC_MUXED(WEMUX2, 38);
338 INIT_GPIO_DESC_MUXED(WEMUX2, 53);
339 INIT_GPIO_DESC_MUXED(WEMUX2, 40);
340 INIT_GPIO_DESC_MUXED(WEMUX2, 36);
341 }
342 #else
pxa27x_mfp_init(void)343 static inline void pxa27x_mfp_init(void) {}
344 #endif /* CONFIG_PXA27x */
345
346 #ifdef CONFIG_PM
347 static unsigned long saved_gafr[2][4];
348 static unsigned long saved_gpdr[4];
349 static unsigned long saved_gplr[4];
350 static unsigned long saved_pgsr[4];
351
pxa2xx_mfp_suspend(void)352 static int pxa2xx_mfp_suspend(void)
353 {
354 int i;
355
356 /* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
357 for (i = 0; i < pxa_last_gpio; i++) {
358 if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
359 (GPDR(i) & GPIO_bit(i))) {
360 if (GPLR(i) & GPIO_bit(i))
361 PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
362 else
363 PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
364 }
365 }
366
367 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
368 saved_gafr[0][i] = GAFR_L(i);
369 saved_gafr[1][i] = GAFR_U(i);
370 saved_gpdr[i] = GPDR(i * 32);
371 saved_gplr[i] = GPLR(i * 32);
372 saved_pgsr[i] = PGSR(i);
373
374 GPSR(i * 32) = PGSR(i);
375 GPCR(i * 32) = ~PGSR(i);
376 }
377
378 /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
379 for (i = 0; i < pxa_last_gpio; i++) {
380 if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
381 ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
382 (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
383 GPDR(i) |= GPIO_bit(i);
384 else
385 GPDR(i) &= ~GPIO_bit(i);
386 }
387
388 return 0;
389 }
390
pxa2xx_mfp_resume(void)391 static void pxa2xx_mfp_resume(void)
392 {
393 int i;
394
395 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
396 GAFR_L(i) = saved_gafr[0][i];
397 GAFR_U(i) = saved_gafr[1][i];
398 GPSR(i * 32) = saved_gplr[i];
399 GPCR(i * 32) = ~saved_gplr[i];
400 GPDR(i * 32) = saved_gpdr[i];
401 PGSR(i) = saved_pgsr[i];
402 }
403 PSSR = PSSR_RDH | PSSR_PH;
404 }
405 #else
406 #define pxa2xx_mfp_suspend NULL
407 #define pxa2xx_mfp_resume NULL
408 #endif
409
410 struct syscore_ops pxa2xx_mfp_syscore_ops = {
411 .suspend = pxa2xx_mfp_suspend,
412 .resume = pxa2xx_mfp_resume,
413 };
414
pxa2xx_mfp_init(void)415 static int __init pxa2xx_mfp_init(void)
416 {
417 int i;
418
419 if (!cpu_is_pxa2xx())
420 return 0;
421
422 if (cpu_is_pxa25x())
423 pxa25x_mfp_init();
424
425 if (cpu_is_pxa27x())
426 pxa27x_mfp_init();
427
428 /* clear RDH bit to enable GPIO receivers after reset/sleep exit */
429 PSSR = PSSR_RDH;
430
431 /* initialize gafr_run[], pgsr_lpm[] from existing values */
432 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
433 gpdr_lpm[i] = GPDR(i * 32);
434
435 return 0;
436 }
437 postcore_initcall(pxa2xx_mfp_init);
438