Searched refs:PT64_ROOT_4LEVEL (Results 1 – 4 of 4) sorted by relevance
35 #define PT64_ROOT_4LEVEL 4 macro
2253 if (iterator->level >= PT64_ROOT_4LEVEL && in shadow_walk_init_using_root()2254 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL && in shadow_walk_init_using_root()3564 } else if (shadow_root_level >= PT64_ROOT_4LEVEL) { in mmu_alloc_direct_roots()3698 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) { in mmu_alloc_shadow_roots()3716 if (mmu->root_role.level >= PT64_ROOT_4LEVEL) { in mmu_alloc_shadow_roots()3759 else if (mmu->root_role.level == PT64_ROOT_4LEVEL) in mmu_alloc_shadow_roots()3775 bool need_pml5 = mmu->root_role.level > PT64_ROOT_4LEVEL; in mmu_alloc_special_roots()3787 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL || in mmu_alloc_special_roots()3788 mmu->root_role.level < PT64_ROOT_4LEVEL) in mmu_alloc_special_roots()3892 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) { in kvm_mmu_sync_roots()[all …]
291 return pgtable_l5_enabled() ? PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; in get_npt_level()4055 } else if (root_level >= PT64_ROOT_4LEVEL) { in svm_load_mmu_pgd()
2152 construct_eptp(&vmx->vcpu, 0, PT64_ROOT_4LEVEL)); in prepare_vmcs02_constant_state()