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Searched refs:PLL_REF_DIV (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/clk/x86/
Dclk-cgu-pll.c17 #define PLL_REF_DIV(x) ((x) + 0x08) macro
46 mult = lgm_get_clk_val(pll->membase, PLL_REF_DIV(pll->reg), 0, 12); in lgm_pll_recalc_rate()
47 div = lgm_get_clk_val(pll->membase, PLL_REF_DIV(pll->reg), 18, 6); in lgm_pll_recalc_rate()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clock_source.h52 CS_SF(PLL_REF_DIV, PLL_REF_DIV, mask_sh)
202 type PLL_REF_DIV; \
Ddce_clock_source.c1614 calc_pll_cs_init_data.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV; in dce110_clk_src_construct()
1633 calc_pll_cs_init_data_hdmi.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV; in dce110_clk_src_construct()
/linux-6.1.9/drivers/video/fbdev/aty/
Dmach64_ct.c389 pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_get_pll_ct()
515 pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_init_pll_ct()
628 aty_st_pll_ct(PLL_REF_DIV, pll->ct.pll_ref_div, par); in aty_resume_pll_ct()
Datyfb_base.c2476 u8 pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_init()
3102 M = pll_regs[PLL_REF_DIV]; in atyfb_setup_sparc()
/linux-6.1.9/drivers/gpu/drm/bridge/
Dchipone-icn6211.c85 #define PLL_REF_DIV 0x6b macro
339 chipone_writeb(icn, PLL_REF_DIV, ref_div); in chipone_configure_pll()
/linux-6.1.9/include/video/
Dmach64.h782 #define PLL_REF_DIV 0x02 macro