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Searched refs:PLL_GPLL (Results 1 – 25 of 36) sorted by relevance

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/linux-6.1.9/include/dt-bindings/clock/
Drk3036-cru.h13 #define PLL_GPLL 3 macro
Drk3188-cru-common.h14 #define PLL_GPLL 4 macro
Drk3128-cru.h14 #define PLL_GPLL 4 macro
Drk3228-cru.h14 #define PLL_GPLL 4 macro
Drv1108-cru.h13 #define PLL_GPLL 2 macro
Drk3288-cru.h14 #define PLL_GPLL 4 macro
Drk3328-cru.h14 #define PLL_GPLL 4 macro
Drk3368-cru.h14 #define PLL_GPLL 5 macro
Dpx30-cru.h182 #define PLL_GPLL 1 macro
Drockchip,rv1126-cru.h13 #define PLL_GPLL 1 macro
Drk3399-cru.h15 #define PLL_GPLL 5 macro
Drk3568-cru.h73 #define PLL_GPLL 4 macro
/linux-6.1.9/Documentation/devicetree/bindings/clock/
Drockchip,px30-cru.yaml114 clocks = <&xin24m>, <&pmucru PLL_GPLL>;
/linux-6.1.9/drivers/clk/rockchip/
Dclk-rk3188.c222 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
233 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
Dclk-rk3036.c141 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
Dclk-rk3128.c165 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
Dclk-rk3228.c175 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(9),
Dclk-rk3328.c224 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
Dclk-rv1108.c158 [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RV1108_PLL_CON(16),
Dclk-rk3368.c138 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3368_PLL_CON(16),
Dclk-rk3288.c232 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12),
Dclk-px30.c200 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p, 0, PX30_PMU_PLL_CON(0),
/linux-6.1.9/arch/arm/boot/dts/
Drk3188-bqedison2qc.dts227 assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
Drk3066a.dtsi210 assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
/linux-6.1.9/arch/arm64/boot/dts/rockchip/
Drk3399-gru-scarlet.dtsi369 <&cru PLL_GPLL>, <&cru PLL_CPLL>,

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