Searched refs:PLLX_BASE (Results 1 – 6 of 6) sorted by relevance
59 #define PLLX_BASE 0xe0 macro390 .base_reg = PLLX_BASE,945 readl(clk_base + PLLX_BASE); in tegra20_cpu_clock_suspend()970 base = readl_relaxed(clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()978 clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()
17 #define PLLX_BASE 0xe0 macro
61 #define PLLX_BASE 0xe0 macro501 .base_reg = PLLX_BASE,
64 #define PLLX_BASE 0xe0 macro497 .base_reg = PLLX_BASE,
54 #define PLLX_BASE 0xe0 macro188 .base_reg = PLLX_BASE,
78 #define PLLX_BASE 0xe0 macro1660 .base_reg = PLLX_BASE,