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Searched refs:PLANE_PRIMARY (Results 1 – 13 of 13) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/gvt/
Dreg.h71 (((p) == PIPE_A) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x50080)) : \
73 (((p) == PIPE_B) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x50088)) : \
75 (((p) == PIPE_C) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x5008C)) : \
89 (PLANE_PRIMARY) : \
Dhandlers.c1007 int event = SKL_FLIP_EVENT(pipe, PLANE_PRIMARY); in pri_surf_mmio_write()
1052 if (plane == PLANE_PRIMARY) { in reg50080_mmio_write()
2269 MMIO_DH(REG_50080(PIPE_A, PLANE_PRIMARY), D_ALL, NULL, in init_generic_mmio_info()
2272 MMIO_DH(REG_50080(PIPE_B, PLANE_PRIMARY), D_ALL, NULL, in init_generic_mmio_info()
2275 MMIO_DH(REG_50080(PIPE_C, PLANE_PRIMARY), D_ALL, NULL, in init_generic_mmio_info()
Dcmd_parser.c1435 if (info->plane == PLANE_PRIMARY) in gen8_update_plane_mmio_from_mi_display_flip()
/linux-6.1.9/drivers/gpu/drm/i915/
Dintel_pm.c496 fifo_state->plane[PLANE_PRIMARY] = sprite0_start; in vlv_get_fifo_size()
956 FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) | in g4x_write_wm_values()
957 FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA)); in g4x_write_wm_values()
989 (wm->ddl[pipe].plane[PLANE_PRIMARY] << DDL_PLANE_SHIFT)); in vlv_write_wm_values()
1006 FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) | in vlv_write_wm_values()
1007 FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA)); in vlv_write_wm_values()
1023 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) | in vlv_write_wm_values()
1029 FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) | in vlv_write_wm_values()
1032 FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) | in vlv_write_wm_values()
1035 FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI)); in vlv_write_wm_values()
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Dintel_gvt_mmio_table.c161 MMIO_D(REG_50080(PIPE_A, PLANE_PRIMARY)); in iterate_generic_mmio()
170 MMIO_D(REG_50080(PIPE_B, PLANE_PRIMARY)); in iterate_generic_mmio()
179 MMIO_D(REG_50080(PIPE_C, PLANE_PRIMARY)); in iterate_generic_mmio()
/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_sprite.h39 return BIT(PLANE_PRIMARY) | in icl_hdr_plane_mask()
Dintel_display.h178 PLANE_PRIMARY, enumerator
191 for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
Dintel_display_trace.h197 __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];
243 __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];
Dskl_universal_plane.c1934 return plane_id == PLANE_PRIMARY; in skl_plane_has_fbc()
1958 if (plane_id != PLANE_PRIMARY && plane_id != PLANE_SPRITE0) in skl_plane_has_planar()
2166 (plane_id == PLANE_PRIMARY || in skl_plane_has_rc_ccs()
2271 if (plane_id == PLANE_PRIMARY) { in skl_universal_plane_create()
2294 if (plane_id == PLANE_PRIMARY) in skl_universal_plane_create()
Dintel_crtc.c307 PLANE_PRIMARY); in intel_crtc_init()
Dintel_sprite.c1468 if (plane->id == PLANE_PRIMARY && in intel_plane_set_ckey()
1476 if (DISPLAY_VER(dev_priv) >= 9 && plane->id != PLANE_PRIMARY && in intel_plane_set_ckey()
Di9xx_plane.c798 plane->id = PLANE_PRIMARY; in intel_primary_plane_create()
Dintel_color.c1265 plane->id == PLANE_PRIMARY); in need_plane_update()