Searched refs:PIPE_CONFIG (Results 1 – 15 of 15) sorted by relevance
80 #define PIPE_CONFIG(x) ((x) << GB_TILE_MODE0__PIPE_CONFIG__SHIFT) macro421 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()429 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()437 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()445 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()453 PIPE_CONFIG(ADDR_SURF_P4_8x16); in gfx_v6_0_tiling_mode_table_init()456 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()464 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()472 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()481 PIPE_CONFIG(ADDR_SURF_P4_8x16); in gfx_v6_0_tiling_mode_table_init()[all …]
69 #define PIPE_CONFIG(x) ((x) << GB_TILE_MODE0__PIPE_CONFIG__SHIFT) macro2119 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2123 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2127 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2131 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2135 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2139 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2143 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2147 PIPE_CONFIG(ADDR_SURF_P2)); in gfx_v8_0_tiling_mode_table_init()2149 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()[all …]
1056 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1060 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1064 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1068 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1072 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1076 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1079 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1084 PIPE_CONFIG(ADDR_SURF_P4_16x16)); in gfx_v7_0_tiling_mode_table_init()1086 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1089 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()[all …]
190 # define PIPE_CONFIG(x) ((x) << 6) macro
1182 # define PIPE_CONFIG(x) ((x) << 6) macro
1955 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v6_0_crtc_do_set_base()
1827 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v8_0_crtc_do_set_base()
1898 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v10_0_crtc_do_set_base()
1940 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v11_0_crtc_do_set_base()
2359 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2363 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2367 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2371 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2375 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2378 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2382 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2386 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2389 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16)); in cik_tiling_mode_table_init()2391 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()[all …]
2517 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2526 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2535 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2544 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2553 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2562 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2571 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2580 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2589 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2598 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()[all …]
1185 # define PIPE_CONFIG(x) ((x) << 6) macro
1225 # define PIPE_CONFIG(x) ((x) << 6) macro
195 AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in fill_gfx8_tiling_info_from_flags()
1696 typedef enum PIPE_CONFIG { enum1712 } PIPE_CONFIG; typedef