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Searched refs:PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_sh_mask.h4057 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK 0x4 macro
Ddce_11_0_sh_mask.h4171 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK 0x4 macro
Ddce_11_2_sh_mask.h4615 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK 0x4 macro
Ddce_12_0_sh_mask.h10579 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h20079 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK … macro
Ddcn_3_0_3_sh_mask.h21886 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK … macro
Ddcn_1_0_sh_mask.h41191 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK … macro
Ddcn_2_1_0_sh_mask.h43995 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK … macro
Ddcn_3_0_1_sh_mask.h36729 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK … macro
Ddcn_3_0_2_sh_mask.h43270 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK … macro
Ddcn_2_0_0_sh_mask.h49542 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK … macro
Ddcn_3_0_0_sh_mask.h49903 #define PHY_AUX_CNTL__AUXSLAVE_PAD_RXSEL_MASK … macro