Searched refs:PHYBSYMCLK_CLOCK_CNTL (Results 1 – 7 of 7) sorted by relevance
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_dccg.h | 35 SR(PHYBSYMCLK_CLOCK_CNTL),\ 46 SR(PHYBSYMCLK_CLOCK_CNTL),\ 55 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\ 56 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\ 64 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\ 65 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/ |
D | dcn32_dccg.h | 43 SR(PHYBSYMCLK_CLOCK_CNTL),\ 85 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\ 86 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
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D | dcn32_resource.h | 1257 SR(PHYASYMCLK_CLOCK_CNTL), SR(PHYBSYMCLK_CLOCK_CNTL), \
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/ |
D | dcn314_dccg.h | 44 SR(PHYBSYMCLK_CLOCK_CNTL),\ 169 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\ 170 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/ |
D | dcn31_dccg.h | 38 SR(PHYBSYMCLK_CLOCK_CNTL),\ 83 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\ 84 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
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D | dcn31_dccg.c | 442 REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk() 449 REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_dccg.h | 257 uint32_t PHYBSYMCLK_CLOCK_CNTL; member
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