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Searched refs:PG (Results 1 – 22 of 22) sorted by relevance

/linux-6.1.9/arch/m68k/include/asm/
DMC68328.h586 #define PG(x) (1 << (x)) macro
588 #define PG_UART_TXD PG(0) /* Use UART_TXD as PG(0) */
589 #define PG_UART_RXD PG(1) /* Use UART_RXD as PG(1) */
590 #define PG_PWMOUT PG(2) /* Use PWMOUT as PG(2) */
591 #define PG_TOUT2 PG(3) /* Use TOUT2 as PG(3) */
592 #define PG_TIN2 PG(4) /* Use TIN2 as PG(4) */
593 #define PG_TOUT1 PG(5) /* Use TOUT1 as PG(5) */
594 #define PG_TIN1 PG(6) /* Use TIN1 as PG(6) */
595 #define PG_RTCOUT PG(7) /* Use RTCOUT as PG(7) */
DMC68EZ328.h497 #define PG(x) (1 << (x)) macro
DMC68VZ328.h506 #define PG(x) (1 << (x)) macro
/linux-6.1.9/arch/arm/boot/dts/
Dam335x-boneblack.dts19 * All PG 2.0 silicon may not support 1GHz but some of the early
20 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
21 * to support 1GHz OPP so enable it for PG 2.0 on this board.
Ddra76x-mmc-iodelay.dtsi18 * a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
19 * 'rev20' for PG 2.0 and so on.
Dsun8i-h2-plus-bananapi-m2-zero.dts240 /* PG */
Ddra72x-mmc-iodelay.dtsi20 * a revision tag to both the new and old entry. Use 'rev10' for PG 1.0,
21 * 'rev20' for PG 2.0 and so on.
Dsun7i-a20-bananapi.dts234 /* PG */
Dsun6i-a31s-sinovoip-bpi-m2.dts307 /* PG */
Ddra74x-mmc-iodelay.dtsi20 * a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
21 * 'rev20' for PG 2.0 and so on.
/linux-6.1.9/Documentation/devicetree/bindings/power/supply/
Dbq24257.yaml45 GPIO used for connecting the bq2425x device PG (Power Good) pin.
47 possible as this is the recommended way to obtain the charger's input PG
48 state. If this pin is not specified a software-based approach for PG
Dbq2515x.yaml35 GPIO used for connecting the bq2515x device PG (AC Detect)
/linux-6.1.9/arch/loongarch/kernel/
Dhead.S58 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
112 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
/linux-6.1.9/include/linux/ceph/
Drados.h317 f(PGLS, __CEPH_OSD_OP(RD, PG, 1), "pgls") \
318 f(PGLS_FILTER, __CEPH_OSD_OP(RD, PG, 2), "pgls-filter") \
319 f(PG_HITSET_LS, __CEPH_OSD_OP(RD, PG, 3), "pg-hitset-ls") \
320 f(PG_HITSET_GET, __CEPH_OSD_OP(RD, PG, 4), "pg-hitset-get")
/linux-6.1.9/Documentation/devicetree/bindings/hwmon/
Dti,ina2xx.yaml48 the gain value maps directly with the PG bits of the config register.
/linux-6.1.9/drivers/net/ethernet/qlogic/
DKconfig55 mode of DCB is supported. PG and PFC values are related only
/linux-6.1.9/drivers/iio/temperature/
Dmlx90632.c716 s32 PT, PR, PG, PO; in mlx90632_calc_ambient_dsp105() local
723 ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_P_G, &PG); in mlx90632_calc_ambient_dsp105()
742 PT, PR, PG, PO, Gb); in mlx90632_calc_ambient_dsp105()
/linux-6.1.9/arch/x86/kernel/
Dhead_32.S306 andl $0x80000011,%eax # Save PG,PE,ET
/linux-6.1.9/Documentation/devicetree/bindings/pinctrl/
Dingenic,pinctrl.yaml25 ports, PA to PG, for a total of 224 pins.
/linux-6.1.9/arch/powerpc/include/asm/
Dcpm2.h76 #define mk_cr_cmd(PG, SBC, MCN, OP) \ argument
77 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
/linux-6.1.9/drivers/comedi/
DKconfig167 Enable support for Advantech PCL-812/PG, PCL-813/B, ADLink
168 ACL-8112DG/HG/PG, ACL-8113, ACL-8216, ICP DAS A-821PGH/PGL/PGL-NDA,
169 A-822PGH/PGL, A-823PGH/PGL, A-826PG and ICP DAS ISO-813 ISA cards
/linux-6.1.9/drivers/eisa/
Deisa.ids912 ISA9C01 "Matrox PG-1281"
913 ISA9C02 "Matrox PG-1024"
914 ISA9C03 "Matrox PG-641"