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Searched refs:PCLK_WDT (Results 1 – 25 of 38) sorted by relevance

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/linux-6.1.9/include/dt-bindings/clock/
Ds3c2412.h41 #define PCLK_WDT 32 macro
Ds3c2443.h79 #define PCLK_WDT 83 macro
Dsamsung,s3c64xx-clock.h84 #define PCLK_WDT 69 macro
Drk3036-cru.h77 #define PCLK_WDT 368 macro
Dexynos7-clk.h125 #define PCLK_WDT 3 macro
Drk3188-cru-common.h83 #define PCLK_WDT 331 macro
Drk3128-cru.h92 #define PCLK_WDT 319 macro
Drv1108-cru.h135 #define PCLK_WDT 284 macro
Drk3288-cru.h160 #define PCLK_WDT 368 macro
Drk3308-cru.h193 #define PCLK_WDT 214 macro
Drk3328-cru.h167 #define PCLK_WDT 236 macro
Drk3368-cru.h150 #define PCLK_WDT 368 macro
Drockchip,rv1126-cru.h310 #define PCLK_WDT 248 macro
Drk3399-cru.h275 #define PCLK_WDT 380 macro
/linux-6.1.9/arch/arm/boot/dts/
Ds3c2416.dtsi122 clocks = <&clocks PCLK_WDT>;
Ds3c64xx.dtsi101 clocks = <&clocks PCLK_WDT>;
Drk3xxx.dtsi351 clocks = <&cru PCLK_WDT>;
/linux-6.1.9/drivers/clk/samsung/
Dclk-s3c2443.c132 GATE(PCLK_WDT, "wdt", "pclk", PCLKCON, 11, 0, 0),
163 ALIAS(PCLK_WDT, NULL, "watchdog"),
Dclk-s3c64xx.c240 GATE_BUS(PCLK_WDT, "pclk_wdt", "pclk", PCLK_GATE, 5),
345 ALIAS(PCLK_WDT, NULL, "watchdog"),
Dclk-s3c2412.c106 GATE(PCLK_WDT, "wdt", "pclk", CLKCON, 28, 0, 0),
/linux-6.1.9/drivers/clk/rockchip/
Dclk-rk3036.c416 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
Dclk-rk3128.c512 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
Dclk-rk3188.c519 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
Dclk-rk3328.c796 SGRF_GATE(PCLK_WDT, "pclk_wdt", "pclk_bus"),
Dclk-rv1108.c632 GATE(PCLK_WDT, "pclk_wdt", "pclk_bus_pre", 0,

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