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Searched refs:PCLK_PIPEPHY0 (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/Documentation/devicetree/bindings/phy/
Dphy-rockchip-naneng-combphy.yaml100 <&cru PCLK_PIPEPHY0>,
/linux-6.1.9/arch/arm64/boot/dts/rockchip/
Drk3568.dtsi218 <&cru PCLK_PIPEPHY0>,
/linux-6.1.9/include/dt-bindings/clock/
Drk3568-cru.h443 #define PCLK_PIPEPHY0 380 macro
/linux-6.1.9/drivers/clk/rockchip/
Dclk-rk3568.c1442 GATE(PCLK_PIPEPHY0, "pclk_pipephy0", "pclk_top", 0,