| /linux-6.1.9/include/dt-bindings/clock/ |
| D | rk3036-cru.h | 60 #define PCLK_GPIO0 320 macro
|
| D | rk3188-cru-common.h | 93 #define PCLK_GPIO0 341 macro
|
| D | rk3128-cru.h | 93 #define PCLK_GPIO0 320 macro
|
| D | rk3228-cru.h | 93 #define PCLK_GPIO0 320 macro
|
| D | rk3288-cru.h | 112 #define PCLK_GPIO0 320 macro
|
| D | rk3308-cru.h | 194 #define PCLK_GPIO0 215 macro
|
| D | rk3328-cru.h | 131 #define PCLK_GPIO0 200 macro
|
| D | rk3368-cru.h | 107 #define PCLK_GPIO0 320 macro
|
| D | rockchip,rv1126-cru.h | 51 #define PCLK_GPIO0 38 macro
|
| D | rk3568-cru.h | 59 #define PCLK_GPIO0 46 macro
|
| /linux-6.1.9/drivers/clk/rockchip/ |
| D | clk-rk3036.c | 423 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 9, GFLAGS),
|
| D | clk-rk3128.c | 520 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 9, GFLAGS),
|
| D | clk-rk3228.c | 609 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 8, GFLAGS),
|
| D | clk-rk3188.c | 498 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 9, GFLAGS),
|
| D | clk-rk3328.c | 779 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_bus", 0, RK3328_CLKGATE_CON(16), 7, GFLAGS),
|
| D | clk-rk3368.c | 828 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pd_pmu", 0, RK3368_CLKGATE_CON(23), 4, GFLAGS),
|
| D | clk-rk3288.c | 781 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pd_pmu", 0, RK3288_CLKGATE_CON(17), 4, GFLAGS),
|
| D | clk-rk3308.c | 882 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 12, GFLAGS),
|
| D | clk-rv1126.c | 332 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pdpmu", 0,
|
| D | clk-rk3568.c | 1500 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pdpmu", 0,
|
| /linux-6.1.9/arch/arm/boot/dts/ |
| D | rk3188.dtsi | 231 clocks = <&cru PCLK_GPIO0>;
|
| D | rk3066a.dtsi | 280 clocks = <&cru PCLK_GPIO0>;
|
| D | rk3036.dtsi | 582 clocks = <&cru PCLK_GPIO0>;
|
| D | rk322x.dtsi | 955 clocks = <&cru PCLK_GPIO0>;
|
| /linux-6.1.9/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 983 clocks = <&cru PCLK_GPIO0>;
|