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Searched refs:PCIE0_BASE__INST0_SEG2 (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/
Dnavi12_ip_offset.h827 #define PCIE0_BASE__INST0_SEG2 0 macro
Dnavi14_ip_offset.h827 #define PCIE0_BASE__INST0_SEG2 0x00000D20 macro
Dsienna_cichlid_ip_offset.h834 #define PCIE0_BASE__INST0_SEG2 0x00000D20 macro
Dbeige_goby_ip_offset.h982 #define PCIE0_BASE__INST0_SEG2 0x00000D20 macro
Drenoir_ip_offset.h1077 #define PCIE0_BASE__INST0_SEG2 0 macro
Dvangogh_ip_offset.h1182 #define PCIE0_BASE__INST0_SEG2 0x00000D20 macro
Darct_ip_offset.h864 #define PCIE0_BASE__INST0_SEG2 0x04440000 macro
Daldebaran_ip_offset.h1152 #define PCIE0_BASE__INST0_SEG2 0 macro