Home
last modified time | relevance | path

Searched refs:PA_CL_CLIP_CNTL__UCP_ENA_1_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h5584 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK 0x00000002L macro
Dgfx_7_2_sh_mask.h5567 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK 0x2 macro
Dgfx_8_0_sh_mask.h6355 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK 0x2 macro
Dgfx_8_1_sh_mask.h6889 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK 0x2 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h16909 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK macro
Dgc_9_1_sh_mask.h18218 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK macro
Dgc_9_2_1_sh_mask.h18094 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK macro
Dgc_9_4_2_sh_mask.h10341 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK macro
Dgc_11_0_0_sh_mask.h22109 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK macro
Dgc_10_1_0_sh_mask.h24282 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK macro
Dgc_11_0_3_sh_mask.h24443 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK macro
Dgc_10_3_0_sh_mask.h22540 #define PA_CL_CLIP_CNTL__UCP_ENA_1_MASK macro