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Searched refs:PACKET3_SET_SH_REG_START (Results 1 – 11 of 11) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dsi_enums.h268 #define PACKET3_SET_SH_REG_START 0x00002c00 macro
Dsoc15d.h293 #define PACKET3_SET_SH_REG_START 0x00002c00 macro
Dnvd.h331 #define PACKET3_SET_SH_REG_START 0x00002c00 macro
Dvid.h347 #define PACKET3_SET_SH_REG_START 0x00002c00 macro
Dcikd.h465 #define PACKET3_SET_SH_REG_START 0x00002c00 macro
Dgfx_v9_4_2.c383 - PACKET3_SET_SH_REG_START; in gfx_v9_4_2_run_shader()
391 - PACKET3_SET_SH_REG_START; in gfx_v9_4_2_run_shader()
398 - PACKET3_SET_SH_REG_START; in gfx_v9_4_2_run_shader()
Dgfx_v9_0.c4438 - PACKET3_SET_SH_REG_START; in gfx_v9_0_do_edc_gpr_workarounds()
4445 - PACKET3_SET_SH_REG_START; in gfx_v9_0_do_edc_gpr_workarounds()
4466 - PACKET3_SET_SH_REG_START; in gfx_v9_0_do_edc_gpr_workarounds()
4473 - PACKET3_SET_SH_REG_START; in gfx_v9_0_do_edc_gpr_workarounds()
4494 - PACKET3_SET_SH_REG_START; in gfx_v9_0_do_edc_gpr_workarounds()
4501 - PACKET3_SET_SH_REG_START; in gfx_v9_0_do_edc_gpr_workarounds()
Dgfx_v8_0.c1571 ib.ptr[ib.length_dw++] = vgpr_init_regs[i] - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1577 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1597 ib.ptr[ib.length_dw++] = sgpr1_init_regs[i] - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1603 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1623 ib.ptr[ib.length_dw++] = sgpr2_init_regs[i] - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1629 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
Dsid.h1854 #define PACKET3_SET_SH_REG_START 0x00002c00 macro
/linux-6.1.9/drivers/gpu/drm/radeon/
Dsid.h1791 #define PACKET3_SET_SH_REG_START 0x0000b000 macro
Dcikd.h1933 #define PACKET3_SET_SH_REG_START 0x0000b000 macro