Searched refs:Op2 (Results 1 – 7 of 7) sorted by relevance
| /linux-6.1.9/arch/arm64/kvm/ |
| D | sys_regs.h | 18 (u32)(x)->CRn, (u32)(x)->CRm, (u32)(x)->Op2)
25 u8 Op2; member
35 .Op2 = ((esr) >> 17) & 0x7, \
42 .Op2 = ((esr) >> 17) & 0x7, \
60 u8 Op2; member
101 p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); in print_sys_reg_msg()
183 return i1->Op2 - i2->Op2; in cmp_sys_reg()
219 #define Op2(_x) .Op2 = _x macro
225 Op2(sys_reg_Op2(reg))
|
| D | sys_regs.c | 225 switch (p->Op2) { in access_gic_sgi()
747 pmceid = kvm_pmu_get_pmceid(vcpu, (p->Op2 & 1)); in access_pmceid()
777 if (r->Op2 == 2) { in access_pmu_evcntr()
784 } else if (r->Op2 == 0) { in access_pmu_evcntr()
802 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evcntr()
831 if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) { in access_pmu_evtyper()
836 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evtyper()
871 if (r->Op2 & 0x1) { in access_pmcnten()
899 if (r->Op2 & 0x1) in access_pminten()
1363 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
[all …]
|
| D | trace_handle_exit.h | 172 __field(u8, Op2)
184 __entry->Op2 = reg->Op2;
190 __entry->CRm, __entry->Op2,
|
| D | vgic-sys-reg-v3.c | 232 u8 idx = r->Op2 & 3; in set_gic_ap0r()
244 u8 idx = r->Op2 & 3; in get_gic_ap0r()
258 u8 idx = r->Op2 & 3; in set_gic_ap1r()
270 u8 idx = r->Op2 & 3; in get_gic_ap1r()
|
| /linux-6.1.9/arch/arm/include/asm/vdso/ |
| D | cp15.h | 14 #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ argument
15 "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
|
| /linux-6.1.9/arch/arm64/kvm/hyp/nvhe/ |
| D | sys_regs.c | 333 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
|
| /linux-6.1.9/Documentation/virt/kvm/devices/ |
| D | arm-vgic-v3.rst | 190 | Op 0 | Op1 | CRn | CRm | Op2 |
|