Home
last modified time | relevance | path

Searched refs:OTG (Results 1 – 25 of 124) sorted by relevance

12345

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_optc.h32 SRI(OTG_VSTARTUP_PARAM, OTG, inst),\
33 SRI(OTG_VUPDATE_PARAM, OTG, inst),\
34 SRI(OTG_VREADY_PARAM, OTG, inst),\
35 SRI(OTG_MASTER_UPDATE_LOCK, OTG, inst),\
36 SRI(OTG_GLOBAL_CONTROL0, OTG, inst),\
37 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
38 SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\
39 SRI(OTG_GLOBAL_CONTROL4, OTG, inst),\
40 SRI(OTG_DOUBLE_BUFFER_CONTROL, OTG, inst),\
41 SRI(OTG_H_TOTAL, OTG, inst),\
[all …]
Ddcn31_dccg.h45 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
46 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
47 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
48 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
107 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\
108 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\
109 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\
110 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
111 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 0, mask_sh),\
112 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 1, mask_sh),\
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_optc.h33 SRI(OTG_VSTARTUP_PARAM, OTG, inst),\
34 SRI(OTG_VUPDATE_PARAM, OTG, inst),\
35 SRI(OTG_VREADY_PARAM, OTG, inst),\
36 SRI(OTG_MASTER_UPDATE_LOCK, OTG, inst),\
37 SRI(OTG_GLOBAL_CONTROL0, OTG, inst),\
38 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
39 SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\
40 SRI(OTG_GLOBAL_CONTROL4, OTG, inst),\
41 SRI(OTG_DOUBLE_BUFFER_CONTROL, OTG, inst),\
42 SRI(OTG_H_TOTAL, OTG, inst),\
[all …]
Ddcn314_dccg.h52 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
53 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
54 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
55 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
110 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\
111 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\
112 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\
113 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
114 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 0, mask_sh),\
115 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 1, mask_sh),\
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_optc.h32 SRI(OTG_VSTARTUP_PARAM, OTG, inst),\
33 SRI(OTG_VUPDATE_PARAM, OTG, inst),\
34 SRI(OTG_VREADY_PARAM, OTG, inst),\
35 SRI(OTG_MASTER_UPDATE_LOCK, OTG, inst),\
36 SRI(OTG_GLOBAL_CONTROL0, OTG, inst),\
37 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
38 SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\
39 SRI(OTG_GLOBAL_CONTROL4, OTG, inst),\
40 SRI(OTG_DOUBLE_BUFFER_CONTROL, OTG, inst),\
41 SRI(OTG_H_TOTAL, OTG, inst),\
[all …]
Ddcn32_dccg.h51 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
52 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
53 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
54 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
116 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\
117 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\
118 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\
119 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
120 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 0, mask_sh),\
121 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 1, mask_sh),\
[all …]
Ddcn32_resource.h159 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 0, index), \
160 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 1, index), \
161 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 2, index), \
162 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 3, index) \
1002 SRI_ARR(OTG_VSTARTUP_PARAM, OTG, inst), \
1003 SRI_ARR(OTG_VUPDATE_PARAM, OTG, inst), \
1004 SRI_ARR(OTG_VREADY_PARAM, OTG, inst), \
1005 SRI_ARR(OTG_MASTER_UPDATE_LOCK, OTG, inst), \
1006 SRI_ARR(OTG_GLOBAL_CONTROL0, OTG, inst), \
1007 SRI_ARR(OTG_GLOBAL_CONTROL1, OTG, inst), \
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_optc.h34 SRI(OTG_VSTARTUP_PARAM, OTG, inst),\
35 SRI(OTG_VUPDATE_PARAM, OTG, inst),\
36 SRI(OTG_VREADY_PARAM, OTG, inst),\
37 SRI(OTG_MASTER_UPDATE_LOCK, OTG, inst),\
38 SRI(OTG_GLOBAL_CONTROL0, OTG, inst),\
39 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
40 SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\
41 SRI(OTG_GLOBAL_CONTROL4, OTG, inst),\
42 SRI(OTG_DOUBLE_BUFFER_CONTROL, OTG, inst),\
43 SRI(OTG_H_TOTAL, OTG, inst),\
[all …]
Ddcn30_dccg.h41 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
42 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
43 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 4),\
44 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 5),\
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dccg.h38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
39 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
46 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
47 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
48 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 4),\
49 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 5)
81 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
82 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
83 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 0, mask_sh),\
84 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh)
[all …]
Ddcn20_optc.h33 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
34 SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\
35 SRI(OTG_GSL_WINDOW_X, OTG, inst),\
36 SRI(OTG_GSL_WINDOW_Y, OTG, inst),\
37 SRI(OTG_VUPDATE_KEEPOUT, OTG, inst),\
38 SRI(OTG_DSC_START_POSITION, OTG, inst),\
39 SRI(OTG_CRC_CNTL2, OTG, inst),\
45 SRI(OTG_MANUAL_FLOW_CONTROL, OTG, inst), \
46 SRI(OTG_DRR_CONTROL, OTG, inst)
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clock_source.h72 SRII(PIXEL_RATE_CNTL, OTG, 0),\
73 SRII(PIXEL_RATE_CNTL, OTG, 1),\
74 SRII(PIXEL_RATE_CNTL, OTG, 2),\
75 SRII(PIXEL_RATE_CNTL, OTG, 3),\
76 SRII(PIXEL_RATE_CNTL, OTG, 4),\
77 SRII(PIXEL_RATE_CNTL, OTG, 5)
85 SRII(PIXEL_RATE_CNTL, OTG, 0),\
86 SRII(PIXEL_RATE_CNTL, OTG, 1)
98 SRII(PIXEL_RATE_CNTL, OTG, 0),\
99 SRII(PIXEL_RATE_CNTL, OTG, 1),\
[all …]
Ddce_hwseq.h201 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 0), \
202 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 1), \
203 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 2), \
204 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 3), \
235 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 0), \
236 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 1), \
237 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 2), \
238 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 3), \
239 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 4), \
240 HSWEQ_DCN_PIXEL_RATE_REG_LIST(OTG, 5), \
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_optc.h35 SRI(OTG_VSTARTUP_PARAM, OTG, inst),\
36 SRI(OTG_VUPDATE_PARAM, OTG, inst),\
37 SRI(OTG_VREADY_PARAM, OTG, inst),\
38 SRI(OTG_BLANK_CONTROL, OTG, inst),\
39 SRI(OTG_MASTER_UPDATE_LOCK, OTG, inst),\
40 SRI(OTG_GLOBAL_CONTROL0, OTG, inst),\
41 SRI(OTG_DOUBLE_BUFFER_CONTROL, OTG, inst),\
42 SRI(OTG_H_TOTAL, OTG, inst),\
43 SRI(OTG_H_BLANK_START_END, OTG, inst),\
44 SRI(OTG_H_SYNC_A, OTG, inst),\
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_dccg.h20 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
21 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1)
41 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
42 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
43 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 0, mask_sh),\
44 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh)
/linux-6.1.9/Documentation/devicetree/bindings/usb/
Dusb-drd.yaml7 title: Generic USB OTG Controller
15 Tells usb driver the release number of the OTG and EH supplement with
17 decimal (i.e. 2.0 is 0200H). This property is used if any real OTG
27 should default to OTG.
33 Tells OTG controllers we want to disable OTG HNP. Normally HNP is the
34 basic function of real OTG except you want it to be a srp-capable only B
40 Tells OTG controllers we want to disable OTG SRP. SRP is optional for OTG
46 Tells OTG controllers we want to disable OTG ADP. ADP is optional for OTG
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_optc.h33 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
34 SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\
35 SRI(OTG_GSL_WINDOW_X, OTG, inst),\
36 SRI(OTG_GSL_WINDOW_Y, OTG, inst),\
37 SRI(OTG_VUPDATE_KEEPOUT, OTG, inst),\
38 SRI(OTG_DSC_START_POSITION, OTG, inst),\
/linux-6.1.9/Documentation/devicetree/bindings/phy/
Dallwinner,sun8i-v3s-usb-phy.yaml32 description: USB OTG PHY bus clock
39 description: USB OTG reset
46 description: GPIO to the USB OTG ID pin
50 description: GPIO to the USB OTG VBUS detect pin
53 description: Power supply to detect the USB OTG VBUS
56 description: Regulator controlling USB OTG VBUS
Dallwinner,sun5i-a13-usb-phy.yaml32 description: USB OTG PHY bus clock
39 - description: USB OTG reset
49 description: GPIO to the USB OTG ID pin
53 description: GPIO to the USB OTG VBUS detect pin
56 description: Power supply to detect the USB OTG VBUS
59 description: Regulator controlling USB OTG VBUS
Dallwinner,sun50i-h6-usb-phy.yaml34 - description: USB OTG PHY bus clock
44 - description: USB OTG reset
54 description: GPIO to the USB OTG ID pin
58 description: GPIO to the USB OTG VBUS detect pin
61 description: Power supply to detect the USB OTG VBUS
64 description: Regulator controlling USB OTG VBUS
Dallwinner,sun8i-a23-usb-phy.yaml34 - description: USB OTG PHY bus clock
44 - description: USB OTG reset
54 description: GPIO to the USB OTG ID pin
58 description: GPIO to the USB OTG VBUS detect pin
61 description: Power supply to detect the USB OTG VBUS
64 description: Regulator controlling USB OTG VBUS
Dallwinner,sun50i-a64-usb-phy.yaml36 - description: USB OTG PHY bus clock
46 - description: USB OTG reset
56 description: GPIO to the USB OTG ID pin
60 description: GPIO to the USB OTG VBUS detect pin
63 description: Power supply to detect the USB OTG VBUS
66 description: Regulator controlling USB OTG VBUS
Dallwinner,sun8i-r40-usb-phy.yaml36 - description: USB OTG PHY bus clock
48 - description: USB OTG reset
60 description: GPIO to the USB OTG ID pin
64 description: GPIO to the USB OTG VBUS detect pin
67 description: Power supply to detect the USB OTG VBUS
70 description: Regulator controlling USB OTG VBUS
Dallwinner,sun6i-a31-usb-phy.yaml34 - description: USB OTG PHY bus clock
46 - description: USB OTG reset
58 description: GPIO to the USB OTG ID pin
62 description: GPIO to the USB OTG VBUS detect pin
65 description: Power supply to detect the USB OTG VBUS
68 description: Regulator controlling USB OTG VBUS
/linux-6.1.9/drivers/usb/phy/
DKconfig19 Enable this to support the USB OTG transceiver in AB8500 chip.
24 tristate "Freescale USB OTG Transceiver Driver"
29 Enable this to support Freescale USB OTG transceiver.
32 tristate "Philips ISP1301 with OMAP OTG"
40 USB-On-The-Go transceiver working with the OMAP OTG controller.
85 Enable this to support the USB OTG transceiver on TWL6030
87 and OTG SRP events capabilities. For all other transceiver functionality
104 tristate "OMAP USB OTG controller driver"
107 Enable this to support some transceivers on OMAP1 platforms. OTG
137 and OTG drivers (to be selected separately).
[all …]

12345