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Searched refs:OP2 (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/arch/arm/kernel/
Dhw_breakpoint.c48 #define READ_WB_REG_CASE(OP2, M, VAL) \ argument
49 case ((OP2 << 4) + M): \
50 ARM_DBG_READ(c0, c ## M, OP2, VAL); \
53 #define WRITE_WB_REG_CASE(OP2, M, VAL) \ argument
54 case ((OP2 << 4) + M): \
55 ARM_DBG_WRITE(c0, c ## M, OP2, VAL); \
58 #define GEN_READ_WB_REG_CASES(OP2, VAL) \ argument
59 READ_WB_REG_CASE(OP2, 0, VAL); \
60 READ_WB_REG_CASE(OP2, 1, VAL); \
61 READ_WB_REG_CASE(OP2, 2, VAL); \
[all …]
/linux-6.1.9/arch/arm/include/asm/
Dhw_breakpoint.h109 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
110 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
113 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
114 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
/linux-6.1.9/fs/afs/
Dinternal.h1721 #define ASSERTRANGE(L, OP1, N, OP2, H) \ argument
1723 if (unlikely(!((L) OP1 (N)) || !((N) OP2 (H)))) { \
1726 printk(KERN_ERR "%lu "#OP1" %lu "#OP2" %lu is false\n", \
1729 printk(KERN_ERR "0x%lx "#OP1" 0x%lx "#OP2" 0x%lx is false\n", \
1768 #define ASSERTRANGE(L, OP1, N, OP2, H) \ argument
/linux-6.1.9/tools/arch/arm64/include/uapi/asm/
Dkvm.h241 ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
/linux-6.1.9/arch/arm64/include/uapi/asm/
Dkvm.h241 ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
/linux-6.1.9/arch/sparc/net/
Dbpf_jit_comp_32.c29 #define OP2(X) ((X) << 22) macro
33 #define F2(X, Y) (OP(X) | OP2(Y))
Dbpf_jit_comp_64.c58 #define OP2(X) ((X) << 22) macro
63 #define F2(X, Y) (OP(X) | OP2(Y))