Searched refs:NUM_DISPCLK_DPM_LEVELS (Results 1 – 19 of 19) sorted by relevance
44 #define NUM_DISPCLK_DPM_LEVELS 4 macro113 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
104 #define NUM_DISPCLK_DPM_LEVELS 8 macro123 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
104 #define NUM_DISPCLK_DPM_LEVELS 7 macro129 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
105 #define NUM_DISPCLK_DPM_LEVELS 8 macro124 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
43 #define NUM_DISPCLK_DPM_LEVELS 8 macro57 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)590 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
42 #define NUM_DISPCLK_DPM_LEVELS 8 macro60 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)686 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz1045 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
35 #define NUM_DISPCLK_DPM_LEVELS 8 macro1035 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz1382 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
38 #define NUM_DISPCLK_DPM_LEVELS 8 macro1073 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz1415 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
33 #define NUM_DISPCLK_DPM_LEVELS 4 macro71 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
537 …table.entries[i].dispclk_mhz = find_max_clk_value(clock_table->DispClocks, NUM_DISPCLK_DPM_LEVELS); in dcn315_clk_mgr_helper_populate_bw_params()
33 #define NUM_DISPCLK_DPM_LEVELS 8 macro79 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
520 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn316_clk_mgr_helper_populate_bw_params()
106 #define NUM_DISPCLK_DPM_LEVELS 8 macro132 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
583 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn31_clk_mgr_helper_populate_bw_params()
51 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
591 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn314_clk_mgr_helper_populate_bw_params()655 …table.entries[i].dispclk_mhz = find_max_clk_value(clock_table->DispClocks, NUM_DISPCLK_DPM_LEVELS); in dcn314_clk_mgr_helper_populate_bw_params()
43 #define NUM_DISPCLK_DPM_LEVELS 8 macro56 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)314 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ];
45 #define NUM_DISPCLK_DPM_LEVELS 8 macro60 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)427 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ];
345 for (i = 0; i < NUM_DISPCLK_DPM_LEVELS; i++)