| /linux-6.1.9/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | nv40.c | 63 int N1 = (coef & 0x0000ff00) >> 8; in read_pll_2() local
69 khz = ref * N1 / M1; in read_pll_2()
125 int *N1, int *M1, int *N2, int *M2, int *log2P) in nv40_clk_calc_pll() argument
138 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P); in nv40_clk_calc_pll()
151 int N1, M1, N2, M2, log2P; in nv40_clk_calc() local
156 &N1, &M1, &N2, &M2, &log2P); in nv40_clk_calc()
162 clk->npll_coef = (N1 << 8) | M1; in nv40_clk_calc()
165 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_clk_calc()
171 &N1, &M1, NULL, NULL, &log2P); in nv40_clk_calc()
175 clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1; in nv40_clk_calc()
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| D | pllnv04.c | 151 int M1, N1, M2, N2, log2P; in getMNP_double() local
170 for (N1 = minN1; N1 <= maxN1; N1++) { in getMNP_double()
171 calcclk1 = crystal * N1 / M1; in getMNP_double()
211 *pN1 = N1; in getMNP_double()
228 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc() argument
233 ret = getMNP_single(subdev, info, freq, N1, M1, P); in nv04_pll_calc()
239 ret = getMNP_double(subdev, info, freq, N1, M1, N2, M2, P); in nv04_pll_calc()
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| D | nv04.c | 35 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local
36 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P); in nv04_clk_pll_calc()
39 pv->N1 = N1; in nv04_clk_pll_calc()
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| D | pll.h | 9 int *N1, int *M1, int *N2, int *M2, int *P);
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| D | mcp77.c | 57 int N1, M1; in read_pll() local
70 N1 = (coef & 0x0000ff00) >> 8; in read_pll()
73 clock = ref * N1 / M1; in read_pll()
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| D | nv50.c | 166 int N1, N2, M1, M2; in read_pll() local
176 N1 = (coef & 0x0000ff00) >> 8; in read_pll()
179 freq = ref * N1 / M1; in read_pll()
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| /linux-6.1.9/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| D | nv50.c | 41 int N1, M1, N2, M2, P; in nv50_devinit_pll_set() local
50 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv50_devinit_pll_set()
60 nvkm_mask(device, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1); in nv50_devinit_pll_set()
69 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set()
73 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set()
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| D | nv04.c | 164 if (oldM && pv->M1 && (oldN / oldM < pv->N1 / pv->M1)) in setPLL_single()
363 int N1, M1, N2, M2, P; in nv04_devinit_pll_set() local
370 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv04_devinit_pll_set()
375 pv.N1 = N1; in nv04_devinit_pll_set()
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| /linux-6.1.9/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | ramnv40.c | 40 int N1, M1, N2, M2; in nv40_ram_calc() local
49 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P); in nv40_ram_calc()
57 ram->coef = (N1 << 8) | M1; in nv40_ram_calc()
60 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_ram_calc()
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| D | ramgf100.c | 143 int N1, M1, P; in gf100_ram_calc() local
216 &N1, NULL, &M1, &P); in gf100_ram_calc()
225 ram_wr32(fuc, 0x10fe24, (P << 16) | (N1 << 8) | M1); in gf100_ram_calc()
231 &N1, NULL, &M1, &P); in gf100_ram_calc()
238 ram_wr32(fuc, 0x132004, (P << 16) | (N1 << 8) | M1); in gf100_ram_calc()
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| /linux-6.1.9/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| D | pll.h | 9 uint8_t N1, M1, N2, M2; member
11 uint8_t M1, N1, M2, N2;
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| /linux-6.1.9/drivers/net/pcs/ |
| D | Kconfig | 22 tristate "Renesas RZ/N1 MII converter"
26 on RZ/N1 SoCs. This PCS converts MII to RMII/RGMII or can be set in
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| /linux-6.1.9/drivers/dma/dw/ |
| D | Kconfig | 20 tristate "Renesas RZ/N1 DMAMUX driver"
24 Support the Renesas RZ/N1 DMAMUX which is located in front of
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| /linux-6.1.9/Documentation/devicetree/bindings/spi/ |
| D | snps,dw-apb-ssi.yaml | 58 - description: Renesas RZ/N1 SPI Controller
72 - description: Renesas RZ/N1 SPI Controller
77 - const: renesas,rzn1-spi # RZ/N1
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| /linux-6.1.9/Documentation/devicetree/bindings/net/dsa/ |
| D | renesas,rzn1-a5psw.yaml | 7 title: Renesas RZ/N1 Advanced 5 ports ethernet switch
13 The advanced 5 ports switch is present on the Renesas RZ/N1 SoC family and
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| /linux-6.1.9/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxl-s905d-phicomm-n1.dts | 12 model = "Phicomm N1";
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| /linux-6.1.9/Documentation/devicetree/bindings/net/pcs/ |
| D | renesas,rzn1-miic.yaml | 7 title: Renesas RZ/N1 MII converter
13 This MII converter is present on the Renesas RZ/N1 SoC family. It is
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| /linux-6.1.9/Documentation/arm64/ |
| D | silicon-errata.rst | 127 | ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
129 | ARM | Neoverse-N1 | #1349291 | N/A |
131 | ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 |
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| /linux-6.1.9/drivers/net/dsa/ |
| D | Kconfig | 66 tristate "Renesas RZ/N1 A5PSW Ethernet switch support"
72 RZ/N1 SoC.
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| /linux-6.1.9/Documentation/devicetree/bindings/pinctrl/ |
| D | renesas,rzn1-pinctrl.yaml | 7 title: Renesas RZ/N1 Pin Controller
19 - const: renesas,rzn1-pinctrl # Generic RZ/N1
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| /linux-6.1.9/Documentation/devicetree/bindings/dma/ |
| D | renesas,rzn1-dmamux.yaml | 7 title: Renesas RZ/N1 DMA mux
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| /linux-6.1.9/Documentation/devicetree/bindings/rtc/ |
| D | renesas,rzn1-rtc.yaml | 7 title: Renesas RZ/N1 SoCs Real-Time Clock DT bindings
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| /linux-6.1.9/Documentation/ABI/testing/ |
| D | sysfs-bus-iio-dac-ad5766 | 31 select N0 source, write "1" to select N1 source.
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| /linux-6.1.9/Documentation/networking/device_drivers/ethernet/3com/ |
| D | vortex.rst | 94 options=N1,N2,N3,...
145 full_duplex=N1,N2,N3...
154 global_full_duplex=N1
159 flow_ctrl=N1,N2,N3...
197 hw_checksums=N1,N2,N3,...
238 enable_wol=N1,N2,N3,...
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| /linux-6.1.9/Documentation/arm/sa1100/ |
| D | cerf.rst | 23 - Serial ports with a serial console (hardcoded to 38400 8N1)
|