Searched refs:MVEBU_MPPS_PER_REG (Results 1 – 5 of 5) sorted by relevance
33 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_get()36 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_get()49 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_set()52 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_set()
61 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in mvebu_mmio_mpp_ctrl_get()62 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in mvebu_mmio_mpp_ctrl_get()72 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in mvebu_mmio_mpp_ctrl_set()73 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in mvebu_mmio_mpp_ctrl_set()795 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in mvebu_regmap_mpp_ctrl_get()796 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in mvebu_regmap_mpp_ctrl_get()812 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in mvebu_regmap_mpp_ctrl_set()813 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in mvebu_regmap_mpp_ctrl_set()
66 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in dove_pmu_mpp_ctrl_get()67 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in dove_pmu_mpp_ctrl_get()84 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in dove_pmu_mpp_ctrl_set()85 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in dove_pmu_mpp_ctrl_set()
546 nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); in armada_xp_pinctrl_suspend()560 nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); in armada_xp_pinctrl_resume()627 nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); in armada_xp_pinctrl_probe()
193 #define MVEBU_MPPS_PER_REG 8 macro