| /linux-6.1.9/arch/sh/boards/mach-microdev/ |
| D | fdc37c93xapm.c | 58 #define MSB(x) ( (x) >> 8 ) macro
95 SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); in smsc_superio_setup()
106 SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); in smsc_superio_setup()
117 SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); in smsc_superio_setup()
119 SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); in smsc_superio_setup()
131 SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); in smsc_superio_setup()
133 SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); in smsc_superio_setup()
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| /linux-6.1.9/Documentation/sound/soc/ |
| D | dai.rst | 38 MSB is transmitted on the falling edge of the first BCLK after LRC
42 MSB is transmitted on transition of LRC.
45 MSB is transmitted sample size BCLKs before LRC transition.
61 MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
64 MSB is transmitted on rising edge of FRAME/SYNC.
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| /linux-6.1.9/Documentation/devicetree/bindings/gpio/ |
| D | netxbig-gpio-ext.txt | 6 - addr-gpios: GPIOs representing the address register (LSB -> MSB).
7 - data-gpios: GPIOs representing the data register (LSB -> MSB).
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| /linux-6.1.9/Documentation/hwmon/ |
| D | smsc47b397.rst | 41 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
73 LSB MSB
83 Reading the tach LSB locks the tach MSB.
89 The tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB)
191 OUT DX,AL ; Point to HWM Base Addr MSB
193 IN AL,DX ; Get MSB of HWM Base Addr
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| /linux-6.1.9/Documentation/ABI/testing/ |
| D | sysfs-bus-usb-devices-usbsevseg | 16 MSB 0x06; LSB 0x3F, and
20 MSB 0x08; LSB 0xFF.
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| /linux-6.1.9/Documentation/usb/ |
| D | misc_usbsevseg.rst | 20 MSB 0x06; LSB 0x3f
24 MSB 0x08; LSB 0xff
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| /linux-6.1.9/arch/mips/crypto/ |
| D | chacha-core.S | 56 #define MSB 0 macro
64 #define MSB 3 macro
132 lwl T1, (x*4)+MSB ## (IN); \
141 swl X ## x, (x*4)+MSB ## (OUT); \
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| /linux-6.1.9/drivers/gpio/ |
| D | gpio-stmpe.c | 24 enum { LSB, CSB, MSB }; enumerator
186 [REG_RE][MSB] = STMPE_IDX_GPRER_MSB, in stmpe_gpio_irq_sync_unlock()
189 [REG_FE][MSB] = STMPE_IDX_GPFER_MSB, in stmpe_gpio_irq_sync_unlock()
192 [REG_IE][MSB] = STMPE_IDX_IEGPIOR_MSB, in stmpe_gpio_irq_sync_unlock()
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| /linux-6.1.9/Documentation/devicetree/bindings/input/ |
| D | gpio-decoder.txt | 6 first entry representing the MSB.
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| /linux-6.1.9/drivers/media/dvb-frontends/ |
| D | stv6110x_priv.h | 49 #define MSB(y) ((y >> 8) & 0xff) macro
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| D | stv0367_priv.h | 39 #define MSB(Y) (((Y) >> 8) & 0xff) macro
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| D | stb0899_priv.h | 51 #define MSB(y) ((y >> 8) & 0xff) macro
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| D | stv090x_priv.h | 68 #define MSB(__x) ((__x >> 8) & 0xff) macro
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| /linux-6.1.9/arch/x86/crypto/ |
| D | crc32c-pcl-intel-asm_64.S | 274 shl $1, len_dw # Get next MSB
301 less_than_2: # Length should be stored in the MSB
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| /linux-6.1.9/Documentation/bpf/ |
| D | instruction-set.rst | 39 32 bits (MSB) 16 bits 4 bits 4 bits 8 bits (LSB)
72 4 bits (MSB) 1 bit 3 bits (LSB)
86 The four MSB bits store the operation code.
201 3 bits (MSB) 2 bits 3 bits (LSB)
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| /linux-6.1.9/Documentation/devicetree/bindings/hwmon/ |
| D | gpio-fan.txt | 8 ordered MSB-->LSB.
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| /linux-6.1.9/Documentation/driver-api/nfc/ |
| D | nfc-pn544.rst | 29 checksum. Firmware update messages have the length in the second (MSB)
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| /linux-6.1.9/Documentation/devicetree/bindings/thermal/ |
| D | armada-thermal.txt | 24 "control MSB/control 1", with size of 4 (deprecated binding), or point
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| /linux-6.1.9/Documentation/hid/ |
| D | hid-alps.rst | 78 Byte5 Address - Byte 3 (MSB)
98 Byte5 Address - Byte 3 (MSB)
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| /linux-6.1.9/Documentation/devicetree/bindings/bus/ |
| D | brcm,gisb-arb.yaml | 48 appear from MSB to LSB.
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| /linux-6.1.9/Documentation/devicetree/bindings/sound/ |
| D | fsl,sai.yaml | 82 Configures whether the LSB or the MSB is transmitted
84 the MSB is transmitted first as default, or the LSB
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| /linux-6.1.9/Documentation/fb/ |
| D | vt8623fb.rst | 35 with interleaved planes (1 byte interleave), MSB first. Both modes support
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| D | arkfb.rst | 38 with interleaved planes (1 byte interleave), MSB first. Both modes support
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| /linux-6.1.9/drivers/net/wireless/intel/ipw2x00/ |
| D | ipw2200.h | 1630 #define MSB 1 macro
1638 #define EEPROM_PME_CAPABILITY (GET_EEPROM_ADDR(0x09,MSB)) /* 1 byte */
1640 #define EEPROM_VERSION (GET_EEPROM_ADDR(0x24,MSB)) /* 1 byte */
1642 #define EEPROM_SKU_CAPABILITY (GET_EEPROM_ADDR(0x25,MSB)) /* 1 byte */
1645 #define EEPROM_IBSS_CHANNELS_A (GET_EEPROM_ADDR(0x29,MSB)) /* 5 bytes */
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| /linux-6.1.9/Documentation/virt/kvm/x86/ |
| D | timekeeping.rst | 145 set timer to read LSB only and force MSB to zero;
148 0010 - Set Timer 0 MSB mode for port 0x40
149 set timer to read MSB only and force LSB to zero;
153 set timer to read / write LSB first, then MSB;
158 0110 - Set Timer 1 MSB mode for port 0x41 - as described above
163 1010 - Set Timer 2 MSB mode for port 0x42 - as described above
184 01 = MSB only
186 11 = LSB / MSB (16-bit)
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