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Searched refs:MI_FLUSH_DW_USE_GTT (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/gt/
Dgen6_engine_cs.c205 *cs++ = HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT; in mi_flush_dw()
381 *cs++ = I915_GEM_HWS_SEQNO_ADDR | MI_FLUSH_DW_USE_GTT; in gen6_emit_breadcrumb_xcs()
402 *cs++ = I915_GEM_HWS_SEQNO_ADDR | MI_FLUSH_DW_USE_GTT; in gen7_emit_breadcrumb_xcs()
Dgen8_engine_cs.h133 gtt_offset | MI_FLUSH_DW_USE_GTT, in gen8_emit_ggtt_write()
Dintel_gpu_commands.h172 #define MI_FLUSH_DW_USE_GTT (1<<2) macro
/linux-6.1.9/drivers/gpu/drm/i915/pxp/
Dintel_pxp_cmd.c38 *cs++ = I915_GEM_HWS_PXP_ADDR | MI_FLUSH_DW_USE_GTT; in pxp_emit_session_selection()
/linux-6.1.9/drivers/gpu/drm/i915/
Di915_cmd_parser.c354 .mask = MI_FLUSH_DW_USE_GTT,
398 .mask = MI_FLUSH_DW_USE_GTT,
435 .mask = MI_FLUSH_DW_USE_GTT,