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Searched refs:MG_PLL_DIV1 (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_tc_phy_regs.h214 #define MG_PLL_DIV1(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV1_PORT1, \ macro
Dintel_dpll_mgr.c3462 hw_state->mg_pll_div1 = intel_de_read(dev_priv, MG_PLL_DIV1(tc_port)); in mg_pll_get_hw_state()
3708 intel_de_write(dev_priv, MG_PLL_DIV1(tc_port), hw_state->mg_pll_div1); in icl_mg_pll_write()